2003-01-16 01:20:03 +03:00
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/* $NetBSD: we.c,v 1.5 2003/01/15 22:20:07 bouyer Exp $ */
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1997-11-04 00:22:50 +03:00
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/*-
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1998-01-26 23:30:06 +03:00
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* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
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1997-11-04 00:22:50 +03:00
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Device driver for National Semiconductor DS8390/WD83C690 based ethernet
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* adapters.
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*
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* Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
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*
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* Copyright (C) 1993, David Greenman. This software may be used, modified,
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* copied, distributed, and sold, in both source and binary form provided that
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* the above copyright and these terms are retained. Under no circumstances is
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* the author responsible for the proper functioning of this software, nor does
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* the author assume any responsibility for damages incurred with its use.
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*/
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/*
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* Device driver for the Western Digital/SMC 8003 and 8013 series,
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* and the SMC Elite Ultra (8216).
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*/
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2001-11-13 16:14:31 +03:00
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#include <sys/cdefs.h>
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2003-01-16 01:20:03 +03:00
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__KERNEL_RCSID(0, "$NetBSD: we.c,v 1.5 2003/01/15 22:20:07 bouyer Exp $");
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2001-11-13 16:14:31 +03:00
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1997-11-04 00:22:50 +03:00
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/socket.h>
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#include <sys/mbuf.h>
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#include <sys/syslog.h>
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_types.h>
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#include <net/if_media.h>
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#include <net/if_ether.h>
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#include <machine/bus.h>
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1999-03-15 23:19:57 +03:00
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#include <machine/bswap.h>
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1997-11-04 00:22:50 +03:00
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#include <machine/intr.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <dev/ic/dp8390reg.h>
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#include <dev/ic/dp8390var.h>
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2001-03-23 20:34:41 +03:00
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#include <dev/ic/wereg.h>
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#include <dev/ic/wevar.h>
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1997-11-04 00:22:50 +03:00
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1998-06-25 23:21:03 +04:00
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#ifndef __BUS_SPACE_HAS_STREAM_METHODS
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#define bus_space_read_region_stream_2 bus_space_read_region_2
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#define bus_space_write_stream_2 bus_space_write_2
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#define bus_space_write_region_stream_2 bus_space_write_region_2
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#endif
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2001-03-23 20:34:41 +03:00
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static void we_set_media __P((struct we_softc *, int));
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1997-11-04 00:22:50 +03:00
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2001-03-23 20:34:41 +03:00
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static void we_media_init __P((struct dp8390_softc *));
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1997-11-04 00:22:50 +03:00
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2001-03-23 20:34:41 +03:00
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static int we_mediachange __P((struct dp8390_softc *));
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static void we_mediastatus __P((struct dp8390_softc *, struct ifmediareq *));
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1997-11-04 00:22:50 +03:00
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2001-03-23 20:34:41 +03:00
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static void we_recv_int __P((struct dp8390_softc *));
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static void we_init_card __P((struct dp8390_softc *));
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static int we_write_mbuf __P((struct dp8390_softc *, struct mbuf *, int));
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static int we_ring_copy __P((struct dp8390_softc *, int, caddr_t, u_short));
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static void we_read_hdr __P((struct dp8390_softc *, int, struct dp8390_ring *));
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static int we_test_mem __P((struct dp8390_softc *));
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2001-02-12 21:49:03 +03:00
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2001-03-23 20:34:41 +03:00
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static __inline void we_readmem __P((struct we_softc *, int, u_int8_t *, int));
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1997-11-04 00:22:50 +03:00
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/*
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* Delay needed when switching 16-bit access to shared memory.
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*/
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1998-04-07 20:23:19 +04:00
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#define WE_DELAY(wsc) delay(3)
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1997-11-04 00:22:50 +03:00
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/*
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* Enable card RAM, and 16-bit access.
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*/
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#define WE_MEM_ENABLE(wsc) \
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do { \
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if ((wsc)->sc_16bitp) \
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bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
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WE_LAAR, (wsc)->sc_laar_proto | WE_LAAR_M16EN); \
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bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
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WE_MSR, wsc->sc_msr_proto | WE_MSR_MENB); \
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WE_DELAY((wsc)); \
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} while (0)
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/*
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* Disable card RAM, and 16-bit access.
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*/
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#define WE_MEM_DISABLE(wsc) \
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do { \
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bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
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WE_MSR, (wsc)->sc_msr_proto); \
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if ((wsc)->sc_16bitp) \
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bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
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WE_LAAR, (wsc)->sc_laar_proto); \
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WE_DELAY((wsc)); \
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} while (0)
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int
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2001-03-23 20:34:41 +03:00
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we_config(self, wsc, typestr)
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struct device *self;
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struct we_softc *wsc;
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const char *typestr;
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1997-11-04 00:22:50 +03:00
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{
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struct dp8390_softc *sc = &wsc->sc_dp8390;
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u_int8_t x;
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2001-03-23 20:34:41 +03:00
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int i, forced_16bit = 0;
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1997-11-04 00:22:50 +03:00
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/*
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* Allow user to override 16-bit mode. 8-bit takes precedence.
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*/
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2001-07-04 15:14:10 +04:00
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if (self->dv_cfdata->cf_flags & DP8390_FORCE_16BIT_MODE) {
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1997-11-04 00:22:50 +03:00
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wsc->sc_16bitp = 1;
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1999-03-28 16:51:49 +04:00
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forced_16bit = 1;
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}
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2001-07-04 15:14:10 +04:00
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if (self->dv_cfdata->cf_flags & DP8390_FORCE_8BIT_MODE)
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1997-11-04 00:22:50 +03:00
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wsc->sc_16bitp = 0;
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/* Registers are linear. */
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for (i = 0; i < 16; i++)
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sc->sc_reg_map[i] = i;
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/* Now we can use the NIC_{GET,PUT}() macros. */
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printf("%s: %s Ethernet (%s-bit)\n", sc->sc_dev.dv_xname,
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typestr, wsc->sc_16bitp ? "16" : "8");
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/* Get station address from EEPROM. */
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for (i = 0; i < ETHER_ADDR_LEN; i++)
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2001-03-23 20:34:41 +03:00
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sc->sc_enaddr[i] = bus_space_read_1(wsc->sc_asict,
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wsc->sc_asich, WE_PROM + i);
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1997-11-04 00:22:50 +03:00
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/*
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* Set upper address bits and 8/16 bit access to shared memory.
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*/
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if (sc->is790) {
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wsc->sc_laar_proto =
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2001-03-23 20:34:41 +03:00
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bus_space_read_1(wsc->sc_asict, wsc->sc_asich, WE_LAAR) &
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1997-11-04 00:22:50 +03:00
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~WE_LAAR_M16EN;
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2001-03-23 20:34:41 +03:00
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bus_space_write_1(wsc->sc_asict, wsc->sc_asich, WE_LAAR,
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1997-11-04 00:22:50 +03:00
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wsc->sc_laar_proto | (wsc->sc_16bitp ? WE_LAAR_M16EN : 0));
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} else if ((wsc->sc_type & WE_SOFTCONFIG) ||
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#ifdef TOSH_ETHER
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(wsc->sc_type == WE_TYPE_TOSHIBA1) ||
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(wsc->sc_type == WE_TYPE_TOSHIBA4) ||
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#endif
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1999-03-28 16:51:49 +04:00
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(forced_16bit) ||
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1997-11-04 00:22:50 +03:00
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(wsc->sc_type == WE_TYPE_WD8013EBT)) {
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2001-03-23 20:34:41 +03:00
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wsc->sc_laar_proto = (wsc->sc_maddr >> 19) & WE_LAAR_ADDRHI;
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1997-11-04 00:22:50 +03:00
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if (wsc->sc_16bitp)
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wsc->sc_laar_proto |= WE_LAAR_L16EN;
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2001-03-23 20:34:41 +03:00
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bus_space_write_1(wsc->sc_asict, wsc->sc_asich, WE_LAAR,
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1997-11-04 00:22:50 +03:00
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wsc->sc_laar_proto | (wsc->sc_16bitp ? WE_LAAR_M16EN : 0));
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}
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/*
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* Set address and enable interface shared memory.
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*/
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if (sc->is790) {
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/* XXX MAGIC CONSTANTS XXX */
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2001-03-23 20:34:41 +03:00
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x = bus_space_read_1(wsc->sc_asict, wsc->sc_asich, 0x04);
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bus_space_write_1(wsc->sc_asict, wsc->sc_asich, 0x04, x | 0x80);
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bus_space_write_1(wsc->sc_asict, wsc->sc_asich, 0x0b,
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((wsc->sc_maddr >> 13) & 0x0f) |
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((wsc->sc_maddr >> 11) & 0x40) |
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(bus_space_read_1(wsc->sc_asict, wsc->sc_asich, 0x0b) & 0xb0));
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bus_space_write_1(wsc->sc_asict, wsc->sc_asich, 0x04, x);
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1997-11-04 00:22:50 +03:00
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wsc->sc_msr_proto = 0x00;
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sc->cr_proto = 0x00;
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} else {
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#ifdef TOSH_ETHER
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if (wsc->sc_type == WE_TYPE_TOSHIBA1 ||
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wsc->sc_type == WE_TYPE_TOSHIBA4) {
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2001-03-23 20:34:41 +03:00
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bus_space_write_1(wsc->sc_asict, wsc->sc_asich,
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WE_MSR + 1,
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((wsc->sc_maddr >> 8) & 0xe0) | 0x04);
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bus_space_write_1(wsc->sc_asict, wsc->sc_asich,
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WE_MSR + 2,
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((wsc->sc_maddr >> 16) & 0x0f));
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1997-11-04 00:22:50 +03:00
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wsc->sc_msr_proto = WE_MSR_POW;
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} else
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#endif
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2001-03-23 20:34:41 +03:00
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wsc->sc_msr_proto = (wsc->sc_maddr >> 13) &
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1997-11-04 00:22:50 +03:00
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WE_MSR_ADDR;
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sc->cr_proto = ED_CR_RD2;
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}
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2001-03-23 20:34:41 +03:00
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bus_space_write_1(wsc->sc_asict, wsc->sc_asich, WE_MSR,
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1997-11-04 00:22:50 +03:00
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wsc->sc_msr_proto | WE_MSR_MENB);
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WE_DELAY(wsc);
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/*
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* DCR gets:
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*
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* FIFO threshold to 8, No auto-init Remote DMA,
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* byte order=80x86.
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*
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* 16-bit cards also get word-wide DMA transfers.
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*/
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sc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS |
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(wsc->sc_16bitp ? ED_DCR_WTS : 0);
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sc->test_mem = we_test_mem;
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sc->ring_copy = we_ring_copy;
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sc->write_mbuf = we_write_mbuf;
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sc->read_hdr = we_read_hdr;
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sc->recv_int = we_recv_int;
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1998-10-28 01:45:13 +03:00
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sc->init_card = we_init_card;
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1997-11-04 00:22:50 +03:00
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sc->sc_mediachange = we_mediachange;
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sc->sc_mediastatus = we_mediastatus;
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sc->mem_start = 0;
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2001-03-23 20:34:41 +03:00
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/* sc->mem_size has to be set by frontend */
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1997-11-04 00:22:50 +03:00
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sc->sc_flags = self->dv_cfdata->cf_flags;
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/* Do generic parts of attach. */
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2001-02-12 21:49:03 +03:00
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if (wsc->sc_type & WE_SOFTCONFIG)
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sc->sc_media_init = we_media_init;
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else
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sc->sc_media_init = dp8390_media_init;
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if (dp8390_config(sc)) {
|
1997-11-04 00:22:50 +03:00
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printf("%s: configuration failed\n", sc->sc_dev.dv_xname);
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2001-03-23 20:34:41 +03:00
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return (1);
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1997-11-04 00:22:50 +03:00
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}
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/*
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* Disable 16-bit access to shared memory - we leave it disabled
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* so that:
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*
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* (1) machines reboot properly when the board is set to
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* 16-bit mode and there are conflicting 8-bit devices
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* within the same 128k address space as this board's
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* shared memory, and
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*
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* (2) so that other 8-bit devices with shared memory
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* in this same 128k address space will work.
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*/
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WE_MEM_DISABLE(wsc);
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2001-03-23 20:34:41 +03:00
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return (0);
|
1997-11-04 00:22:50 +03:00
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}
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2001-03-23 20:34:41 +03:00
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static int
|
1997-11-04 00:22:50 +03:00
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we_test_mem(sc)
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struct dp8390_softc *sc;
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{
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|
|
struct we_softc *wsc = (struct we_softc *)sc;
|
|
|
|
bus_space_tag_t memt = sc->sc_buft;
|
|
|
|
bus_space_handle_t memh = sc->sc_bufh;
|
|
|
|
bus_size_t memsize = sc->mem_size;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (wsc->sc_16bitp)
|
|
|
|
bus_space_set_region_2(memt, memh, 0, 0, memsize >> 1);
|
|
|
|
else
|
|
|
|
bus_space_set_region_1(memt, memh, 0, 0, memsize);
|
|
|
|
|
|
|
|
if (wsc->sc_16bitp) {
|
|
|
|
for (i = 0; i < memsize; i += 2) {
|
|
|
|
if (bus_space_read_2(memt, memh, i) != 0)
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
for (i = 0; i < memsize; i++) {
|
|
|
|
if (bus_space_read_1(memt, memh, i) != 0)
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
fail:
|
|
|
|
printf("%s: failed to clear shared memory at offset 0x%x\n",
|
|
|
|
sc->sc_dev.dv_xname, i);
|
|
|
|
WE_MEM_DISABLE(wsc);
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
1998-06-25 23:21:03 +04:00
|
|
|
/*
|
|
|
|
* Given a NIC memory source address and a host memory destination address,
|
|
|
|
* copy 'len' from NIC to host using shared memory. The 'len' is rounded
|
|
|
|
* up to a word - ok as long as mbufs are word-sized.
|
|
|
|
*/
|
2001-03-23 20:34:41 +03:00
|
|
|
static __inline void
|
1997-11-04 00:22:50 +03:00
|
|
|
we_readmem(wsc, from, to, len)
|
|
|
|
struct we_softc *wsc;
|
|
|
|
int from;
|
|
|
|
u_int8_t *to;
|
|
|
|
int len;
|
|
|
|
{
|
|
|
|
bus_space_tag_t memt = wsc->sc_dp8390.sc_buft;
|
|
|
|
bus_space_handle_t memh = wsc->sc_dp8390.sc_bufh;
|
|
|
|
|
1998-06-25 23:21:03 +04:00
|
|
|
if (len & 1)
|
|
|
|
++len;
|
|
|
|
|
|
|
|
if (wsc->sc_16bitp)
|
1998-05-25 14:36:51 +04:00
|
|
|
bus_space_read_region_stream_2(memt, memh, from,
|
1998-06-25 23:21:03 +04:00
|
|
|
(u_int16_t *)to, len >> 1);
|
|
|
|
else
|
|
|
|
bus_space_read_region_1(memt, memh, from,
|
|
|
|
to, len);
|
1997-11-04 00:22:50 +03:00
|
|
|
}
|
|
|
|
|
2001-03-23 20:34:41 +03:00
|
|
|
static int
|
1997-11-04 00:22:50 +03:00
|
|
|
we_write_mbuf(sc, m, buf)
|
|
|
|
struct dp8390_softc *sc;
|
|
|
|
struct mbuf *m;
|
|
|
|
int buf;
|
|
|
|
{
|
|
|
|
struct we_softc *wsc = (struct we_softc *)sc;
|
1998-06-25 23:21:03 +04:00
|
|
|
bus_space_tag_t memt = wsc->sc_dp8390.sc_buft;
|
|
|
|
bus_space_handle_t memh = wsc->sc_dp8390.sc_bufh;
|
|
|
|
u_int8_t *data, savebyte[2];
|
|
|
|
int savelen, len, leftover;
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
u_int8_t *lim;
|
|
|
|
#endif
|
1997-11-04 00:22:50 +03:00
|
|
|
|
|
|
|
savelen = m->m_pkthdr.len;
|
|
|
|
|
|
|
|
WE_MEM_ENABLE(wsc);
|
|
|
|
|
1998-06-25 23:21:03 +04:00
|
|
|
/*
|
|
|
|
* 8-bit boards are simple; no alignment tricks are necessary.
|
|
|
|
*/
|
|
|
|
if (wsc->sc_16bitp == 0) {
|
|
|
|
for (; m != NULL; buf += m->m_len, m = m->m_next)
|
|
|
|
bus_space_write_region_1(memt, memh,
|
|
|
|
buf, mtod(m, u_int8_t *), m->m_len);
|
2003-01-16 01:20:03 +03:00
|
|
|
if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
|
|
|
|
bus_space_set_region_1(memt, memh,
|
|
|
|
buf, 0, ETHER_MIN_LEN - ETHER_CRC_LEN - savelen);
|
|
|
|
savelen = ETHER_MIN_LEN - ETHER_CRC_LEN;
|
|
|
|
}
|
1998-06-25 23:21:03 +04:00
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Start out with no leftover data. */
|
|
|
|
leftover = 0;
|
|
|
|
savebyte[0] = savebyte[1] = 0;
|
|
|
|
|
|
|
|
for (; m != NULL; m = m->m_next) {
|
|
|
|
len = m->m_len;
|
|
|
|
if (len == 0)
|
|
|
|
continue;
|
|
|
|
data = mtod(m, u_int8_t *);
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
lim = data + len;
|
|
|
|
#endif
|
|
|
|
while (len > 0) {
|
|
|
|
if (leftover) {
|
|
|
|
/*
|
|
|
|
* Data left over (from mbuf or realignment).
|
|
|
|
* Buffer the next byte, and write it and
|
|
|
|
* the leftover data out.
|
|
|
|
*/
|
|
|
|
savebyte[1] = *data++;
|
|
|
|
len--;
|
|
|
|
bus_space_write_stream_2(memt, memh, buf,
|
|
|
|
*(u_int16_t *)savebyte);
|
|
|
|
buf += 2;
|
|
|
|
leftover = 0;
|
1999-03-24 00:41:07 +03:00
|
|
|
} else if (BUS_SPACE_ALIGNED_POINTER(data, u_int16_t)
|
|
|
|
== 0) {
|
1998-06-25 23:21:03 +04:00
|
|
|
/*
|
|
|
|
* Unaligned dta; buffer the next byte.
|
|
|
|
*/
|
|
|
|
savebyte[0] = *data++;
|
|
|
|
len--;
|
|
|
|
leftover = 1;
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* Aligned data; output contiguous words as
|
|
|
|
* much as we can, then buffer the remaining
|
|
|
|
* byte, if any.
|
|
|
|
*/
|
|
|
|
leftover = len & 1;
|
|
|
|
len &= ~1;
|
|
|
|
bus_space_write_region_stream_2(memt, memh,
|
|
|
|
buf, (u_int16_t *)data, len >> 1);
|
|
|
|
data += len;
|
|
|
|
buf += len;
|
|
|
|
if (leftover)
|
|
|
|
savebyte[0] = *data++;
|
|
|
|
len = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (len < 0)
|
|
|
|
panic("we_write_mbuf: negative len");
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
if (data != lim)
|
|
|
|
panic("we_write_mbuf: data != lim");
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
if (leftover) {
|
|
|
|
savebyte[1] = 0;
|
|
|
|
bus_space_write_stream_2(memt, memh, buf,
|
|
|
|
*(u_int16_t *)savebyte);
|
2003-01-16 01:20:03 +03:00
|
|
|
buf += 2;
|
|
|
|
}
|
|
|
|
if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
|
|
|
|
bus_space_set_region_2(memt, memh,
|
|
|
|
buf, 0, (ETHER_MIN_LEN - ETHER_CRC_LEN - savelen) >> 1);
|
|
|
|
savelen = ETHER_MIN_LEN - ETHER_CRC_LEN;
|
1998-06-25 23:21:03 +04:00
|
|
|
}
|
1997-11-04 00:22:50 +03:00
|
|
|
|
1998-06-25 23:21:03 +04:00
|
|
|
out:
|
1997-11-04 00:22:50 +03:00
|
|
|
WE_MEM_DISABLE(wsc);
|
|
|
|
|
|
|
|
return (savelen);
|
|
|
|
}
|
|
|
|
|
2001-03-23 20:34:41 +03:00
|
|
|
static int
|
1997-11-04 00:22:50 +03:00
|
|
|
we_ring_copy(sc, src, dst, amount)
|
|
|
|
struct dp8390_softc *sc;
|
|
|
|
int src;
|
|
|
|
caddr_t dst;
|
|
|
|
u_short amount;
|
|
|
|
{
|
|
|
|
struct we_softc *wsc = (struct we_softc *)sc;
|
|
|
|
u_short tmp_amount;
|
|
|
|
|
|
|
|
/* Does copy wrap to lower addr in ring buffer? */
|
|
|
|
if (src + amount > sc->mem_end) {
|
|
|
|
tmp_amount = sc->mem_end - src;
|
|
|
|
|
|
|
|
/* Copy amount up to end of NIC memory. */
|
|
|
|
we_readmem(wsc, src, dst, tmp_amount);
|
|
|
|
|
|
|
|
amount -= tmp_amount;
|
|
|
|
src = sc->mem_ring;
|
|
|
|
dst += tmp_amount;
|
|
|
|
}
|
|
|
|
|
|
|
|
we_readmem(wsc, src, dst, amount);
|
|
|
|
|
|
|
|
return (src + amount);
|
|
|
|
}
|
|
|
|
|
2001-03-23 20:34:41 +03:00
|
|
|
static void
|
1997-11-04 00:22:50 +03:00
|
|
|
we_read_hdr(sc, packet_ptr, packet_hdrp)
|
|
|
|
struct dp8390_softc *sc;
|
|
|
|
int packet_ptr;
|
|
|
|
struct dp8390_ring *packet_hdrp;
|
|
|
|
{
|
|
|
|
struct we_softc *wsc = (struct we_softc *)sc;
|
|
|
|
|
|
|
|
we_readmem(wsc, packet_ptr, (u_int8_t *)packet_hdrp,
|
|
|
|
sizeof(struct dp8390_ring));
|
1998-01-26 22:21:36 +03:00
|
|
|
#if BYTE_ORDER == BIG_ENDIAN
|
|
|
|
packet_hdrp->count = bswap16(packet_hdrp->count);
|
|
|
|
#endif
|
1997-11-04 00:22:50 +03:00
|
|
|
}
|
|
|
|
|
2001-03-23 20:34:41 +03:00
|
|
|
static void
|
1997-11-04 00:22:50 +03:00
|
|
|
we_recv_int(sc)
|
|
|
|
struct dp8390_softc *sc;
|
|
|
|
{
|
|
|
|
struct we_softc *wsc = (struct we_softc *)sc;
|
|
|
|
|
|
|
|
WE_MEM_ENABLE(wsc);
|
|
|
|
dp8390_rint(sc);
|
|
|
|
WE_MEM_DISABLE(wsc);
|
|
|
|
}
|
|
|
|
|
2001-03-23 20:34:41 +03:00
|
|
|
static void
|
2001-02-12 21:49:03 +03:00
|
|
|
we_media_init(struct dp8390_softc *sc)
|
|
|
|
{
|
|
|
|
struct we_softc *wsc = (void *) sc;
|
|
|
|
int defmedia = IFM_ETHER;
|
|
|
|
u_int8_t x;
|
|
|
|
|
|
|
|
if (sc->is790) {
|
|
|
|
x = bus_space_read_1(wsc->sc_asict, wsc->sc_asich, WE790_HWR);
|
|
|
|
bus_space_write_1(wsc->sc_asict, wsc->sc_asich, WE790_HWR,
|
|
|
|
x | WE790_HWR_SWH);
|
|
|
|
if (bus_space_read_1(wsc->sc_asict, wsc->sc_asich, WE790_GCR) &
|
|
|
|
WE790_GCR_GPOUT)
|
|
|
|
defmedia |= IFM_10_2;
|
|
|
|
else
|
|
|
|
defmedia |= IFM_10_5;
|
|
|
|
bus_space_write_1(wsc->sc_asict, wsc->sc_asich, WE790_HWR,
|
|
|
|
x & ~WE790_HWR_SWH);
|
|
|
|
} else {
|
|
|
|
x = bus_space_read_1(wsc->sc_asict, wsc->sc_asich, WE_IRR);
|
|
|
|
if (x & WE_IRR_OUT2)
|
|
|
|
defmedia |= IFM_10_2;
|
|
|
|
else
|
|
|
|
defmedia |= IFM_10_5;
|
|
|
|
}
|
|
|
|
|
|
|
|
ifmedia_init(&sc->sc_media, 0, dp8390_mediachange, dp8390_mediastatus);
|
|
|
|
ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_10_2, 0, NULL);
|
|
|
|
ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_10_5, 0, NULL);
|
|
|
|
ifmedia_set(&sc->sc_media, defmedia);
|
|
|
|
}
|
|
|
|
|
2001-03-23 20:34:41 +03:00
|
|
|
static int
|
1997-11-04 00:22:50 +03:00
|
|
|
we_mediachange(sc)
|
|
|
|
struct dp8390_softc *sc;
|
|
|
|
{
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Current media is already set up. Just reset the interface
|
|
|
|
* to let the new value take hold. The new media will be
|
|
|
|
* set up in we_init_card() called via dp8390_init().
|
|
|
|
*/
|
|
|
|
dp8390_reset(sc);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
2001-03-23 20:34:41 +03:00
|
|
|
static void
|
1997-11-04 00:22:50 +03:00
|
|
|
we_mediastatus(sc, ifmr)
|
|
|
|
struct dp8390_softc *sc;
|
|
|
|
struct ifmediareq *ifmr;
|
|
|
|
{
|
|
|
|
struct ifmedia *ifm = &sc->sc_media;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The currently selected media is always the active media.
|
|
|
|
*/
|
|
|
|
ifmr->ifm_active = ifm->ifm_cur->ifm_media;
|
|
|
|
}
|
|
|
|
|
2001-03-23 20:34:41 +03:00
|
|
|
static void
|
1997-11-04 00:22:50 +03:00
|
|
|
we_init_card(sc)
|
|
|
|
struct dp8390_softc *sc;
|
|
|
|
{
|
|
|
|
struct we_softc *wsc = (struct we_softc *)sc;
|
|
|
|
struct ifmedia *ifm = &sc->sc_media;
|
|
|
|
|
2001-03-23 20:34:41 +03:00
|
|
|
if (wsc->sc_init_hook)
|
|
|
|
(*wsc->sc_init_hook)(wsc);
|
|
|
|
|
1997-11-04 00:22:50 +03:00
|
|
|
we_set_media(wsc, ifm->ifm_cur->ifm_media);
|
|
|
|
}
|
|
|
|
|
2001-03-23 20:34:41 +03:00
|
|
|
static void
|
1997-11-04 00:22:50 +03:00
|
|
|
we_set_media(wsc, media)
|
|
|
|
struct we_softc *wsc;
|
|
|
|
int media;
|
|
|
|
{
|
|
|
|
struct dp8390_softc *sc = &wsc->sc_dp8390;
|
|
|
|
bus_space_tag_t asict = wsc->sc_asict;
|
|
|
|
bus_space_handle_t asich = wsc->sc_asich;
|
|
|
|
u_int8_t hwr, gcr, irr;
|
|
|
|
|
|
|
|
if (sc->is790) {
|
|
|
|
hwr = bus_space_read_1(asict, asich, WE790_HWR);
|
|
|
|
bus_space_write_1(asict, asich, WE790_HWR,
|
|
|
|
hwr | WE790_HWR_SWH);
|
|
|
|
gcr = bus_space_read_1(asict, asich, WE790_GCR);
|
|
|
|
if (IFM_SUBTYPE(media) == IFM_10_2)
|
|
|
|
gcr |= WE790_GCR_GPOUT;
|
|
|
|
else
|
|
|
|
gcr &= ~WE790_GCR_GPOUT;
|
|
|
|
bus_space_write_1(asict, asich, WE790_GCR,
|
|
|
|
gcr | WE790_GCR_LIT);
|
|
|
|
bus_space_write_1(asict, asich, WE790_HWR,
|
1997-11-08 09:13:53 +03:00
|
|
|
hwr & ~WE790_HWR_SWH);
|
1997-11-04 00:22:50 +03:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
irr = bus_space_read_1(wsc->sc_asict, wsc->sc_asich, WE_IRR);
|
|
|
|
if (IFM_SUBTYPE(media) == IFM_10_2)
|
|
|
|
irr |= WE_IRR_OUT2;
|
|
|
|
else
|
|
|
|
irr &= ~WE_IRR_OUT2;
|
|
|
|
bus_space_write_1(wsc->sc_asict, wsc->sc_asich, WE_IRR, irr);
|
|
|
|
}
|