1993-06-18 10:19:16 +04:00
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/*#define DEBUG 1*/
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1993-03-21 12:45:37 +03:00
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Don Ahn.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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1993-05-22 11:56:12 +04:00
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* from: @(#)fd.c 7.4 (Berkeley) 5/25/91
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1994-03-06 20:18:43 +03:00
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* $Id: fd.c,v 1.25 1994/03/06 17:18:54 mycroft Exp $
|
1993-06-18 10:19:16 +04:00
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*
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* Largely rewritten to handle multiple controllers and drives
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* By Julian Elischer, Sun Apr 4 16:34:33 WST 1993
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*/
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1993-03-21 12:45:37 +03:00
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#include "fd.h"
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1993-04-06 14:06:28 +04:00
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#if NFDC > 0
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1993-03-21 12:45:37 +03:00
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1993-12-20 12:05:17 +03:00
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#include <sys/param.h>
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#include <sys/dkbad.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/file.h>
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#include <sys/ioctl.h>
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#include <sys/buf.h>
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#include <sys/uio.h>
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#include <machine/pio.h>
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#include <i386/isa/isa.h>
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#include <i386/isa/isa_device.h>
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#include <i386/isa/fdreg.h>
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#include <i386/isa/icu.h>
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#include <i386/isa/rtc.h>
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1993-03-21 12:45:37 +03:00
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#define FDUNIT(s) ((s>>3)&1)
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#define FDTYPE(s) ((s)&7)
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#define b_cylin b_resid
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#define FDBLK 512
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struct fd_type {
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int sectrac; /* sectors per track */
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int secsize; /* size code for sectors */
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int datalen; /* data len when secsize = 0 */
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int gap; /* gap len between sectors */
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int tracks; /* total num of tracks */
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int size; /* size of disk in sectors */
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int steptrac; /* steps per cylinder */
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int trans; /* transfer speed code */
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1993-06-18 10:19:16 +04:00
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int heads; /* number of heads */
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1993-03-21 12:45:37 +03:00
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};
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1993-06-18 10:19:16 +04:00
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struct fd_type fd_types[] =
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{
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{ 18,2,0xFF,0x1B,80,2880,1,0,2 }, /* 1.44 meg HD 3.5in floppy */
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{ 15,2,0xFF,0x1B,80,2400,1,0,2 }, /* 1.2 meg HD floppy */
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{ 9,2,0xFF,0x23,40,720,2,1,2 }, /* 360k floppy in 1.2meg drive */
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{ 9,2,0xFF,0x2A,40,720,1,1,2 }, /* 360k floppy in DD drive */
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1993-05-10 10:45:16 +04:00
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{ 9,2,0xFF,0x2A,80,1440,1,0 }, /* 720K drive. PROBABLY WRONG */
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1993-03-21 12:45:37 +03:00
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};
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1993-06-18 10:19:16 +04:00
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#define DRVS_PER_CTLR 2
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/***********************************************************************\
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* Per controller structure. *
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\***********************************************************************/
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struct fdc_data
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{
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int fdcu; /* our unit number */
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int baseport;
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int dmachan;
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int flags;
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#define FDC_ATTACHED 0x01
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struct fd_data *fd;
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int fdu; /* the active drive */
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1993-03-21 12:45:37 +03:00
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struct buf head; /* Head of buf chain */
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struct buf rhead; /* Raw head of buf chain */
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1993-06-18 10:19:16 +04:00
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int state;
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int retry;
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int status[7]; /* copy of the registers */
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}fdc_data[NFDC];
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/***********************************************************************\
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* Per drive structure. *
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* N per controller (presently 2) (DRVS_PER_CTLR) *
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\***********************************************************************/
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struct fd_data {
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struct fdc_data *fdc;
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int fdu; /* this unit number */
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int fdsu; /* this units number on this controller */
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int type; /* Drive type (HD, DD */
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struct fd_type *ft; /* pointer to the type descriptor */
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int flags;
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#define FD_OPEN 0x01 /* it's open */
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#define FD_ACTIVE 0x02 /* it's active */
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#define FD_MOTOR 0x04 /* motor should be on */
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#define FD_MOTOR_WAIT 0x08 /* motor coming up */
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int skip;
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int hddrv;
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int track; /* where we think the head is */
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} fd_data[NFD];
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/***********************************************************************\
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* Throughout this file the following conventions will be used: *
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* fd is a pointer to the fd_data struct for the drive in question *
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* fdc is a pointer to the fdc_data struct for the controller *
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* fdu is the floppy drive unit number *
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* fdcu is the floppy controller unit number *
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* fdsu is the floppy drive unit number on that controller. (sub-unit) *
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\***********************************************************************/
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typedef int fdu_t;
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typedef int fdcu_t;
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typedef int fdsu_t;
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typedef struct fd_data *fd_p;
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typedef struct fdc_data *fdc_p;
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#define DEVIDLE 0
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#define FINDWORK 1
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#define DOSEEK 2
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#define SEEKCOMPLETE 3
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#define IOCOMPLETE 4
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#define RECALCOMPLETE 5
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#define STARTRECAL 6
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#define RESETCTLR 7
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#define SEEKWAIT 8
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#define RECALWAIT 9
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#define MOTORWAIT 10
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#define IOTIMEDOUT 11
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#ifdef DEBUG
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char *fdstates[] =
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{
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"DEVIDLE",
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"FINDWORK",
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"DOSEEK",
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"SEEKCOMPLETE",
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"IOCOMPLETE",
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"RECALCOMPLETE",
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"STARTRECAL",
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"RESETCTLR",
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"SEEKWAIT",
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"RECALWAIT",
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"MOTORWAIT",
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"IOTIMEDOUT"
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};
|
1993-03-21 12:45:37 +03:00
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1993-06-18 10:19:16 +04:00
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int fd_debug = 1;
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#define TRACE0(arg) if(fd_debug) printf(arg)
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#define TRACE1(arg1,arg2) if(fd_debug) printf(arg1,arg2)
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#else DEBUG
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#define TRACE0(arg)
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#define TRACE1(arg1,arg2)
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#endif DEBUG
|
1993-03-21 12:45:37 +03:00
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1993-06-18 10:19:16 +04:00
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extern int hz;
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1993-03-21 12:45:37 +03:00
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/* state needed for current transfer */
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/****************************************************************************/
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/* autoconfiguration stuff */
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/****************************************************************************/
|
1993-06-18 10:19:16 +04:00
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int fdprobe(), fdattach(), fd_turnoff();
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1993-03-21 12:45:37 +03:00
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1993-04-06 14:06:28 +04:00
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struct isa_driver fdcdriver = {
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fdprobe, fdattach, "fdc",
|
1993-03-21 12:45:37 +03:00
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};
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/*
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* probe for existance of controller
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*/
|
1993-06-18 10:19:16 +04:00
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fdprobe(dev)
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struct isa_device *dev;
|
1993-03-21 12:45:37 +03:00
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{
|
1993-06-18 10:19:16 +04:00
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fdc_p fdc = &fdc_data[dev->id_unit];
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int fdcu = dev->id_unit;
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fdc->baseport = dev->id_iobase;
|
1993-03-21 12:45:37 +03:00
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|
1993-08-01 23:22:24 +04:00
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/* Try a reset, don't change motor on */
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set_motor(fdcu,0,1);
|
1994-03-06 20:18:43 +03:00
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delay(100);
|
1993-08-01 23:22:24 +04:00
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set_motor(fdcu,0,0);
|
1993-03-21 12:45:37 +03:00
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/* see if it can handle a command */
|
1993-06-18 10:19:16 +04:00
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if (out_fdc(fdcu,NE7CMD_SPECIFY) < 0)
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{
|
1993-03-21 12:45:37 +03:00
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return(0);
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|
}
|
1993-06-18 10:19:16 +04:00
|
|
|
out_fdc(fdcu,0xDF);
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|
out_fdc(fdcu,2);
|
1993-04-15 11:57:50 +04:00
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|
1993-06-18 10:19:16 +04:00
|
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|
fdc->dmachan = dev->id_drq;
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|
fdc->fdcu = dev->id_unit;
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|
fdc->flags |= FDC_ATTACHED;
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|
fdc->state = DEVIDLE;
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/*
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|
* tdr: I've put this here, because with the new way for
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|
* attach() being called it cannot go there.
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|
*/
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|
|
/* Set transfer to 500kbps */
|
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|
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outb(fdc->baseport+fdctl,0); /*XXX*/
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|
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|
return (IO_FDCSIZE);
|
1993-03-21 12:45:37 +03:00
|
|
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}
|
|
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|
|
|
|
/*
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|
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* wire controller into system, look for floppy units
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|
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|
*/
|
1993-06-18 10:19:16 +04:00
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fdattach(dev)
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|
|
struct isa_device *dev;
|
1993-03-21 12:45:37 +03:00
|
|
|
{
|
1993-06-18 10:19:16 +04:00
|
|
|
unsigned fdt=0,st0, cyl;
|
|
|
|
fdu_t fdu = dev->id_unit;
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|
|
fdcu_t fdcu = dev->id_masunit;
|
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|
|
fdc_p fdc = &fdc_data[dev->id_masunit];
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|
|
fd_p fd = &fd_data[dev->id_unit];
|
1993-06-29 23:12:44 +04:00
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|
|
int fdsu = dev->id_physid;
|
1993-06-18 10:19:16 +04:00
|
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|
|
|
|
|
if(dev->id_physid < 0 || dev->id_physid > 1) {
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|
|
|
printf("fdc%d: cannot support physical unit %d\n",
|
|
|
|
dev->id_masunit, dev->id_physid);
|
1993-05-04 12:27:29 +04:00
|
|
|
return 0;
|
|
|
|
}
|
1993-06-18 10:19:16 +04:00
|
|
|
if(dev->id_masunit==0)
|
|
|
|
fdt = rtcin(RTC_FDISKETTE);
|
|
|
|
else
|
|
|
|
fdt = 0xff; /* cmos only knows two floppies */
|
1993-04-06 14:06:28 +04:00
|
|
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|
1993-06-18 10:19:16 +04:00
|
|
|
if(dev->id_physid == 1)
|
1993-04-15 11:57:50 +04:00
|
|
|
fdt <<= 4;
|
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
#ifdef notyet
|
|
|
|
/* select it */
|
|
|
|
fd_turnon1(fdu);
|
|
|
|
spinwait(1000); /* 1 sec */
|
|
|
|
out_fdc(fdcu,NE7CMD_RECAL); /* Recalibrate Function */
|
|
|
|
out_fdc(fdcu,fdsu);
|
|
|
|
spinwait(1000); /* 1 sec */
|
|
|
|
|
|
|
|
/* anything responding */
|
|
|
|
out_fdc(fdcu,NE7CMD_SENSEI);
|
|
|
|
st0 = in_fdc(fdcu);
|
|
|
|
cyl = in_fdc(fdcu);
|
1993-04-15 11:57:50 +04:00
|
|
|
if (st0 & 0xd0)
|
1993-06-18 10:19:16 +04:00
|
|
|
continue;
|
|
|
|
#endif
|
|
|
|
fd->track = -2;
|
|
|
|
fd->fdc = fdc;
|
|
|
|
fd->fdsu = fdsu;
|
1993-04-15 11:57:50 +04:00
|
|
|
|
1993-05-10 10:45:16 +04:00
|
|
|
switch(fdt & 0xf0) {
|
|
|
|
case RTCFDT_NONE:
|
1993-06-20 12:42:05 +04:00
|
|
|
/*printf("fd%d at fdc%d targ %d: nonexistant device\n",
|
|
|
|
dev->id_unit, dev->id_masunit, dev->id_physid);*/
|
1993-06-21 13:39:52 +04:00
|
|
|
return 0;
|
1993-05-10 10:45:16 +04:00
|
|
|
break;
|
|
|
|
case RTCFDT_12M:
|
1993-05-20 14:36:45 +04:00
|
|
|
printf("fd%d at fdc%d targ %d: 1.2MB 80 cyl, 2 head, 15 sec\n",
|
1993-05-10 10:45:16 +04:00
|
|
|
dev->id_unit, dev->id_masunit, dev->id_physid);
|
1993-06-21 13:39:52 +04:00
|
|
|
fd->type = 1;
|
1993-05-10 10:45:16 +04:00
|
|
|
break;
|
|
|
|
case RTCFDT_144M:
|
1993-05-20 14:36:45 +04:00
|
|
|
printf("fd%d at fdc%d targ %d: 1.44MB 80 cyl, 2 head, 18 sec\n",
|
1993-05-10 10:45:16 +04:00
|
|
|
dev->id_unit, dev->id_masunit, dev->id_physid);
|
1993-06-21 13:39:52 +04:00
|
|
|
fd->type = 0;
|
1993-05-10 10:45:16 +04:00
|
|
|
break;
|
|
|
|
case RTCFDT_360K:
|
1993-05-20 14:36:45 +04:00
|
|
|
printf("fd%d at fdc%d targ %d: 360KB 40 cyl, 2 head, 9 sec\n",
|
1993-05-10 10:45:16 +04:00
|
|
|
dev->id_unit, dev->id_masunit, dev->id_physid);
|
1993-06-21 13:39:52 +04:00
|
|
|
fd->type = 3;
|
1993-05-10 10:45:16 +04:00
|
|
|
break;
|
|
|
|
case RTCFDT_720K:
|
1993-05-20 14:36:45 +04:00
|
|
|
printf("fd%d at fdc%d targ %d: 720KB 80 cyl, 2 head, 9 sec\n",
|
1993-05-10 10:45:16 +04:00
|
|
|
dev->id_unit, dev->id_masunit, dev->id_physid);
|
1993-06-21 13:39:52 +04:00
|
|
|
fd->type = 4;
|
1993-05-10 10:45:16 +04:00
|
|
|
break;
|
|
|
|
default:
|
1993-06-18 10:19:16 +04:00
|
|
|
printf("fd%d at fdc%d targ %d: unknown device type 0x%x\n",
|
1993-05-10 10:45:16 +04:00
|
|
|
dev->id_unit, dev->id_masunit, dev->id_physid,
|
|
|
|
fdt & 0xf0);
|
1993-06-21 13:39:52 +04:00
|
|
|
return 0;
|
1993-05-10 10:45:16 +04:00
|
|
|
break;
|
1993-04-15 11:57:50 +04:00
|
|
|
}
|
|
|
|
|
1993-06-21 13:39:52 +04:00
|
|
|
fd->ft = &fd_types[fd->type];
|
|
|
|
fd_turnoff(fdu);
|
|
|
|
return 1;
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
fdsize(dev)
|
|
|
|
dev_t dev;
|
|
|
|
{
|
|
|
|
return(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************/
|
1993-06-18 10:19:16 +04:00
|
|
|
/* fdstrategy */
|
1993-03-21 12:45:37 +03:00
|
|
|
/****************************************************************************/
|
|
|
|
fdstrategy(bp)
|
|
|
|
register struct buf *bp; /* IO operation to perform */
|
|
|
|
{
|
|
|
|
register struct buf *dp,*dp0,*dp1;
|
|
|
|
long nblocks,blknum;
|
1993-06-18 10:19:16 +04:00
|
|
|
int s;
|
|
|
|
fdcu_t fdcu;
|
|
|
|
fdu_t fdu;
|
|
|
|
fdc_p fdc;
|
|
|
|
fd_p fd;
|
|
|
|
|
|
|
|
fdu = FDUNIT(minor(bp->b_dev));
|
|
|
|
fd = &fd_data[fdu];
|
|
|
|
fdc = fd->fdc;
|
|
|
|
fdcu = fdc->fdcu;
|
1993-03-21 12:45:37 +03:00
|
|
|
/*type = FDTYPE(minor(bp->b_dev));*/
|
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
if ((fdu >= NFD) || (bp->b_blkno < 0)) {
|
|
|
|
printf("fdstrat: fdu = %d, blkno = %d, bcount = %d\n",
|
|
|
|
fdu, bp->b_blkno, bp->b_bcount);
|
1994-01-27 10:10:09 +03:00
|
|
|
panic("fd: error in fdstrategy");
|
1993-03-21 12:45:37 +03:00
|
|
|
bp->b_error = EINVAL;
|
|
|
|
bp->b_flags |= B_ERROR;
|
|
|
|
goto bad;
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* Set up block calculations.
|
|
|
|
*/
|
|
|
|
blknum = (unsigned long) bp->b_blkno * DEV_BSIZE/FDBLK;
|
1993-06-18 10:19:16 +04:00
|
|
|
nblocks = fd->ft->size;
|
1993-03-21 12:45:37 +03:00
|
|
|
if (blknum + (bp->b_bcount / FDBLK) > nblocks) {
|
|
|
|
if (blknum == nblocks) {
|
|
|
|
bp->b_resid = bp->b_bcount;
|
|
|
|
} else {
|
|
|
|
bp->b_error = ENOSPC;
|
|
|
|
bp->b_flags |= B_ERROR;
|
|
|
|
}
|
|
|
|
goto bad;
|
|
|
|
}
|
1993-06-18 10:19:16 +04:00
|
|
|
bp->b_cylin = blknum / (fd->ft->sectrac * fd->ft->heads);
|
|
|
|
dp = &(fdc->head);
|
1993-03-21 12:45:37 +03:00
|
|
|
s = splbio();
|
|
|
|
disksort(dp, bp);
|
1993-07-06 10:06:26 +04:00
|
|
|
untimeout((timeout_t)fd_turnoff, (caddr_t)fdu); /* a good idea */
|
1993-06-18 10:19:16 +04:00
|
|
|
fdstart(fdcu);
|
1993-03-21 12:45:37 +03:00
|
|
|
splx(s);
|
|
|
|
return;
|
|
|
|
|
|
|
|
bad:
|
|
|
|
biodone(bp);
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************/
|
1993-06-18 10:19:16 +04:00
|
|
|
/* motor control stuff */
|
|
|
|
/* remember to not deselect the drive we're working on */
|
1993-03-21 12:45:37 +03:00
|
|
|
/****************************************************************************/
|
1993-06-18 10:19:16 +04:00
|
|
|
set_motor(fdcu_t fdcu, fdu_t fdu, int reset)
|
1993-03-21 12:45:37 +03:00
|
|
|
{
|
|
|
|
int m0,m1;
|
1993-06-18 10:19:16 +04:00
|
|
|
int selunit;
|
|
|
|
fd_p fd;
|
|
|
|
if(fd = fdc_data[fdcu].fd)/* yes an assign! */
|
|
|
|
{
|
|
|
|
selunit = fd->fdsu;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
selunit = 0;
|
|
|
|
}
|
|
|
|
m0 = fd_data[fdcu * DRVS_PER_CTLR + 0].flags & FD_MOTOR;
|
|
|
|
m1 = fd_data[fdcu * DRVS_PER_CTLR + 1].flags & FD_MOTOR;
|
|
|
|
outb(fdc_data[fdcu].baseport+fdout,
|
|
|
|
selunit
|
1993-03-21 12:45:37 +03:00
|
|
|
| (reset ? 0 : (FDO_FRST|FDO_FDMAEN))
|
|
|
|
| (m0 ? FDO_MOEN0 : 0)
|
|
|
|
| (m1 ? FDO_MOEN1 : 0));
|
1993-06-18 10:19:16 +04:00
|
|
|
TRACE1("[0x%x->fdout]",(
|
|
|
|
selunit
|
|
|
|
| (reset ? 0 : (FDO_FRST|FDO_FDMAEN))
|
|
|
|
| (m0 ? FDO_MOEN0 : 0)
|
|
|
|
| (m1 ? FDO_MOEN1 : 0)));
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
fd_turnoff(fdu_t fdu)
|
1993-03-21 12:45:37 +03:00
|
|
|
{
|
1993-06-18 10:19:16 +04:00
|
|
|
fd_p fd = fd_data + fdu;
|
|
|
|
fd->flags &= ~FD_MOTOR;
|
|
|
|
set_motor(fd->fdc->fdcu,fd->fdsu,0);
|
|
|
|
}
|
|
|
|
|
|
|
|
fd_motor_on(fdu_t fdu)
|
|
|
|
{
|
|
|
|
fd_p fd = fd_data + fdu;
|
|
|
|
fd->flags &= ~FD_MOTOR_WAIT;
|
|
|
|
if((fd->fdc->fd == fd) && (fd->fdc->state == MOTORWAIT))
|
|
|
|
{
|
|
|
|
fd_pseudointr(fd->fdc->fdcu);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
fd_turnon(fdu_t fdu)
|
|
|
|
{
|
|
|
|
fd_p fd = fd_data + fdu;
|
|
|
|
if(!(fd->flags & FD_MOTOR))
|
|
|
|
{
|
|
|
|
fd_turnon1(fdu);
|
|
|
|
fd->flags |= FD_MOTOR_WAIT;
|
1993-07-06 10:06:26 +04:00
|
|
|
timeout((timeout_t)fd_motor_on, (caddr_t)fdu, hz); /* in 1 sec its ok */
|
1993-06-18 10:19:16 +04:00
|
|
|
}
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
fd_turnon1(fdu_t fdu)
|
1993-03-21 12:45:37 +03:00
|
|
|
{
|
1993-06-18 10:19:16 +04:00
|
|
|
fd_p fd = fd_data + fdu;
|
|
|
|
fd->flags |= FD_MOTOR;
|
|
|
|
set_motor(fd->fdc->fdcu,fd->fdsu,0);
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************/
|
1993-06-18 10:19:16 +04:00
|
|
|
/* fdc in/out */
|
1993-03-21 12:45:37 +03:00
|
|
|
/****************************************************************************/
|
|
|
|
int
|
1993-06-18 10:19:16 +04:00
|
|
|
in_fdc(fdcu_t fdcu)
|
1993-03-21 12:45:37 +03:00
|
|
|
{
|
1993-06-18 10:19:16 +04:00
|
|
|
int baseport = fdc_data[fdcu].baseport;
|
1993-03-21 12:45:37 +03:00
|
|
|
int i, j = 100000;
|
1993-06-18 10:19:16 +04:00
|
|
|
while ((i = inb(baseport+fdsts) & (NE7_DIO|NE7_RQM))
|
|
|
|
!= (NE7_DIO|NE7_RQM) && j-- > 0)
|
1993-03-21 12:45:37 +03:00
|
|
|
if (i == NE7_RQM) return -1;
|
|
|
|
if (j <= 0)
|
|
|
|
return(-1);
|
1993-06-18 10:19:16 +04:00
|
|
|
#ifdef DEBUG
|
|
|
|
i = inb(baseport+fddata);
|
|
|
|
TRACE1("[fddata->0x%x]",(unsigned char)i);
|
|
|
|
return(i);
|
|
|
|
#else
|
|
|
|
return inb(baseport+fddata);
|
|
|
|
#endif
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
out_fdc(fdcu_t fdcu,int x)
|
1993-03-21 12:45:37 +03:00
|
|
|
{
|
1993-06-18 10:19:16 +04:00
|
|
|
int baseport = fdc_data[fdcu].baseport;
|
1993-03-21 12:45:37 +03:00
|
|
|
int i = 100000;
|
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
while ((inb(baseport+fdsts) & NE7_DIO) && i-- > 0);
|
|
|
|
while ((inb(baseport+fdsts) & NE7_RQM) == 0 && i-- > 0);
|
1993-03-21 12:45:37 +03:00
|
|
|
if (i <= 0) return (-1);
|
1993-06-18 10:19:16 +04:00
|
|
|
outb(baseport+fddata,x);
|
|
|
|
TRACE1("[0x%x->fddata]",x);
|
1993-03-21 12:45:37 +03:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static fdopenf;
|
|
|
|
/****************************************************************************/
|
1993-06-18 10:19:16 +04:00
|
|
|
/* fdopen/fdclose */
|
1993-03-21 12:45:37 +03:00
|
|
|
/****************************************************************************/
|
|
|
|
Fdopen(dev, flags)
|
1993-06-18 10:19:16 +04:00
|
|
|
dev_t dev;
|
|
|
|
int flags;
|
1993-03-21 12:45:37 +03:00
|
|
|
{
|
1993-06-18 10:19:16 +04:00
|
|
|
fdu_t fdu = FDUNIT(minor(dev));
|
|
|
|
/*int type = FDTYPE(minor(dev));*/
|
1993-03-21 12:45:37 +03:00
|
|
|
int s;
|
|
|
|
|
|
|
|
/* check bounds */
|
1993-06-18 10:19:16 +04:00
|
|
|
if (fdu >= NFD) return(ENXIO);
|
|
|
|
/*if (type >= sizeof(fd_types)/sizeof(fd_types[0]) ) return(ENXIO);*/
|
|
|
|
fd_data[fdu].flags |= FD_OPEN;
|
1993-03-21 12:45:37 +03:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
fdclose(dev, flags)
|
1993-06-18 10:19:16 +04:00
|
|
|
dev_t dev;
|
1993-03-21 12:45:37 +03:00
|
|
|
{
|
1993-06-18 10:19:16 +04:00
|
|
|
fdu_t fdu = FDUNIT(minor(dev));
|
|
|
|
fd_data[fdu].flags &= ~FD_OPEN;
|
1993-03-21 12:45:37 +03:00
|
|
|
return(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
/***************************************************************\
|
|
|
|
* fdstart *
|
|
|
|
* We have just queued something.. if the controller is not busy *
|
|
|
|
* then simulate the case where it has just finished a command *
|
|
|
|
* So that it (the interrupt routine) looks on the queue for more*
|
|
|
|
* work to do and picks up what we just added. *
|
|
|
|
* If the controller is already busy, we need do nothing, as it *
|
|
|
|
* will pick up our work when the present work completes *
|
|
|
|
\***************************************************************/
|
|
|
|
fdstart(fdcu_t fdcu)
|
1993-03-21 12:45:37 +03:00
|
|
|
{
|
|
|
|
register struct buf *dp,*bp;
|
|
|
|
int s;
|
1993-06-18 10:19:16 +04:00
|
|
|
fdu_t fdu;
|
1993-03-21 12:45:37 +03:00
|
|
|
|
|
|
|
s = splbio();
|
1993-06-18 10:19:16 +04:00
|
|
|
if(fdc_data[fdcu].state == DEVIDLE)
|
|
|
|
{
|
|
|
|
fdintr(fdcu);
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
splx(s);
|
|
|
|
}
|
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
fd_timeout(fdcu_t fdcu)
|
1993-03-21 12:45:37 +03:00
|
|
|
{
|
1993-06-18 10:19:16 +04:00
|
|
|
fdu_t fdu = fdc_data[fdcu].fdu;
|
1993-03-21 12:45:37 +03:00
|
|
|
int st0, st3, cyl;
|
|
|
|
struct buf *dp,*bp;
|
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
dp = &fdc_data[fdcu].head;
|
1993-03-21 12:45:37 +03:00
|
|
|
bp = dp->b_actf;
|
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
out_fdc(fdcu,NE7CMD_SENSED);
|
|
|
|
out_fdc(fdcu,fd_data[fdu].hddrv);
|
|
|
|
st3 = in_fdc(fdcu);
|
|
|
|
|
|
|
|
out_fdc(fdcu,NE7CMD_SENSEI);
|
|
|
|
st0 = in_fdc(fdcu);
|
|
|
|
cyl = in_fdc(fdcu);
|
|
|
|
printf("fd%d: Operation timeout ST0 %b cyl %d ST3 %b\n",
|
|
|
|
fdu,
|
|
|
|
st0,
|
|
|
|
NE7_ST0BITS,
|
|
|
|
cyl,
|
|
|
|
st3,
|
|
|
|
NE7_ST3BITS);
|
|
|
|
|
|
|
|
if (bp)
|
|
|
|
{
|
|
|
|
retrier(fdcu);
|
|
|
|
fdc_data[fdcu].status[0] = 0xc0;
|
|
|
|
fdc_data[fdcu].state = IOTIMEDOUT;
|
|
|
|
if( fdc_data[fdcu].retry < 6)
|
|
|
|
fdc_data[fdcu].retry = 6;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
fdc_data[fdcu].fd = (fd_p) 0;
|
|
|
|
fdc_data[fdcu].fdu = -1;
|
|
|
|
fdc_data[fdcu].state = DEVIDLE;
|
|
|
|
}
|
|
|
|
fd_pseudointr(fdcu);
|
|
|
|
}
|
1993-03-21 12:45:37 +03:00
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
/* just ensure it has the right spl */
|
|
|
|
fd_pseudointr(fdcu_t fdcu)
|
|
|
|
{
|
|
|
|
int s;
|
|
|
|
s = splbio();
|
|
|
|
fdintr(fdcu);
|
|
|
|
splx(s);
|
|
|
|
}
|
1993-03-21 12:45:37 +03:00
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
/***********************************************************************\
|
|
|
|
* fdintr *
|
|
|
|
* keep calling the state machine until it returns a 0 *
|
|
|
|
* ALWAYS called at SPLBIO *
|
|
|
|
\***********************************************************************/
|
|
|
|
fdintr(fdcu_t fdcu)
|
|
|
|
{
|
|
|
|
fdc_p fdc = fdc_data + fdcu;
|
|
|
|
while(fdstate(fdcu, fdc));
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
/***********************************************************************\
|
|
|
|
* The controller state machine. *
|
|
|
|
* if it returns a non zero value, it should be called again immediatly *
|
|
|
|
\***********************************************************************/
|
|
|
|
int fdstate(fdcu_t fdcu, fdc_p fdc)
|
1993-03-21 12:45:37 +03:00
|
|
|
{
|
|
|
|
int read,head,trac,sec,i,s,sectrac,cyl,st0;
|
|
|
|
unsigned long blknum;
|
1993-06-18 10:19:16 +04:00
|
|
|
fdu_t fdu = fdc->fdu;
|
|
|
|
fd_p fd;
|
|
|
|
register struct buf *dp,*bp;
|
1993-03-21 12:45:37 +03:00
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
dp = &(fdc->head);
|
1993-03-21 12:45:37 +03:00
|
|
|
bp = dp->b_actf;
|
1993-06-18 10:19:16 +04:00
|
|
|
if(!bp)
|
|
|
|
{
|
|
|
|
/***********************************************\
|
|
|
|
* nothing left for this controller to do *
|
|
|
|
* Force into the IDLE state, *
|
|
|
|
\***********************************************/
|
|
|
|
fdc->state = DEVIDLE;
|
|
|
|
if(fdc->fd)
|
|
|
|
{
|
|
|
|
printf("unexpected valid fd pointer (fdu = %d)\n"
|
|
|
|
,fdc->fdu);
|
|
|
|
fdc->fd = (fd_p) 0;
|
|
|
|
fdc->fdu = -1;
|
|
|
|
}
|
|
|
|
TRACE1("[fdc%d IDLE]",fdcu);
|
|
|
|
return(0);
|
|
|
|
}
|
|
|
|
fdu = FDUNIT(minor(bp->b_dev));
|
|
|
|
fd = fd_data + fdu;
|
|
|
|
if (fdc->fd && (fd != fdc->fd))
|
|
|
|
{
|
|
|
|
printf("confused fd pointers\n");
|
|
|
|
}
|
1993-03-21 12:45:37 +03:00
|
|
|
read = bp->b_flags & B_READ;
|
1993-06-18 10:19:16 +04:00
|
|
|
TRACE1("fd%d",fdu);
|
|
|
|
TRACE1("[%s]",fdstates[fdc->state]);
|
|
|
|
TRACE1("(0x%x)",fd->flags);
|
1993-07-06 10:06:26 +04:00
|
|
|
untimeout((timeout_t)fd_turnoff, (caddr_t)fdu);
|
|
|
|
timeout((timeout_t)fd_turnoff, (caddr_t)fdu, 4 * hz);
|
1993-06-18 10:19:16 +04:00
|
|
|
switch (fdc->state)
|
|
|
|
{
|
|
|
|
case DEVIDLE:
|
|
|
|
case FINDWORK: /* we have found new work */
|
|
|
|
fdc->retry = 0;
|
|
|
|
fd->skip = 0;
|
|
|
|
fdc->fd = fd;
|
|
|
|
fdc->fdu = fdu;
|
|
|
|
/*******************************************************\
|
|
|
|
* If the next drive has a motor startup pending, then *
|
|
|
|
* it will start up in it's own good time *
|
|
|
|
\*******************************************************/
|
|
|
|
if(fd->flags & FD_MOTOR_WAIT)
|
|
|
|
{
|
|
|
|
fdc->state = MOTORWAIT;
|
|
|
|
return(0); /* come back later */
|
|
|
|
}
|
|
|
|
/*******************************************************\
|
|
|
|
* Maybe if it's not starting, it SHOULD be starting *
|
|
|
|
\*******************************************************/
|
|
|
|
if (!(fd->flags & FD_MOTOR))
|
|
|
|
{
|
|
|
|
fdc->state = MOTORWAIT;
|
|
|
|
fd_turnon(fdu);
|
|
|
|
return(0);
|
|
|
|
}
|
|
|
|
else /* at least make sure we are selected */
|
|
|
|
{
|
|
|
|
set_motor(fdcu,fd->fdsu,0);
|
|
|
|
}
|
|
|
|
fdc->state = DOSEEK;
|
|
|
|
break;
|
|
|
|
case DOSEEK:
|
|
|
|
if (bp->b_cylin == fd->track)
|
|
|
|
{
|
|
|
|
fdc->state = SEEKCOMPLETE;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
out_fdc(fdcu,NE7CMD_SEEK); /* Seek function */
|
|
|
|
out_fdc(fdcu,fd->fdsu); /* Drive number */
|
|
|
|
out_fdc(fdcu,bp->b_cylin * fd->ft->steptrac);
|
|
|
|
fd->track = -2;
|
|
|
|
fdc->state = SEEKWAIT;
|
|
|
|
return(0); /* will return later */
|
|
|
|
case SEEKWAIT:
|
|
|
|
/* allow heads to settle */
|
1993-07-06 10:06:26 +04:00
|
|
|
timeout((timeout_t)fd_pseudointr, (caddr_t)fdcu, hz/50);
|
1993-06-18 10:19:16 +04:00
|
|
|
fdc->state = SEEKCOMPLETE;
|
|
|
|
return(0); /* will return later */
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SEEKCOMPLETE : /* SEEK DONE, START DMA */
|
1993-03-21 12:45:37 +03:00
|
|
|
/* Make sure seek really happened*/
|
1993-06-18 10:19:16 +04:00
|
|
|
if(fd->track == -2)
|
|
|
|
{
|
|
|
|
int descyl = bp->b_cylin * fd->ft->steptrac;
|
|
|
|
out_fdc(fdcu,NE7CMD_SENSEI);
|
|
|
|
i = in_fdc(fdcu);
|
|
|
|
cyl = in_fdc(fdcu);
|
|
|
|
if (cyl != descyl)
|
|
|
|
{
|
|
|
|
printf("fd%d: Seek to cyl %d failed; am at cyl %d (ST0 = 0x%x)\n", fdu,
|
|
|
|
descyl, cyl, i, NE7_ST0BITS);
|
|
|
|
return(retrier(fdcu));
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
1993-06-18 10:19:16 +04:00
|
|
|
fd->track = bp->b_cylin;
|
|
|
|
isa_dmastart(bp->b_flags, bp->b_un.b_addr+fd->skip,
|
|
|
|
FDBLK, fdc->dmachan);
|
1993-03-21 12:45:37 +03:00
|
|
|
blknum = (unsigned long)bp->b_blkno*DEV_BSIZE/FDBLK
|
1993-06-18 10:19:16 +04:00
|
|
|
+ fd->skip/FDBLK;
|
|
|
|
sectrac = fd->ft->sectrac;
|
|
|
|
sec = blknum % (sectrac * fd->ft->heads);
|
1993-03-21 12:45:37 +03:00
|
|
|
head = sec / sectrac;
|
|
|
|
sec = sec % sectrac + 1;
|
1993-06-18 10:19:16 +04:00
|
|
|
/*XXX*/ fd->hddrv = ((head&1)<<2)+fdu;
|
|
|
|
|
|
|
|
if (read)
|
|
|
|
{
|
|
|
|
out_fdc(fdcu,NE7CMD_READ); /* READ */
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
1993-06-18 10:19:16 +04:00
|
|
|
else
|
|
|
|
{
|
|
|
|
out_fdc(fdcu,NE7CMD_WRITE); /* WRITE */
|
|
|
|
}
|
|
|
|
out_fdc(fdcu,head << 2 | fdu); /* head & unit */
|
|
|
|
out_fdc(fdcu,fd->track); /* track */
|
|
|
|
out_fdc(fdcu,head);
|
|
|
|
out_fdc(fdcu,sec); /* sector XXX +1? */
|
|
|
|
out_fdc(fdcu,fd->ft->secsize); /* sector size */
|
|
|
|
out_fdc(fdcu,sectrac); /* sectors/track */
|
|
|
|
out_fdc(fdcu,fd->ft->gap); /* gap size */
|
|
|
|
out_fdc(fdcu,fd->ft->datalen); /* data length */
|
|
|
|
fdc->state = IOCOMPLETE;
|
1993-07-06 10:06:26 +04:00
|
|
|
timeout((timeout_t)fd_timeout, (caddr_t)fdcu, 2 * hz);
|
1993-06-18 10:19:16 +04:00
|
|
|
return(0); /* will return later */
|
|
|
|
case IOCOMPLETE: /* IO DONE, post-analyze */
|
1993-07-06 10:06:26 +04:00
|
|
|
untimeout((timeout_t)fd_timeout, (caddr_t)fdcu);
|
1993-06-18 10:19:16 +04:00
|
|
|
for(i=0;i<7;i++)
|
|
|
|
{
|
|
|
|
fdc->status[i] = in_fdc(fdcu);
|
|
|
|
}
|
|
|
|
case IOTIMEDOUT: /*XXX*/
|
|
|
|
isa_dmadone(bp->b_flags, bp->b_un.b_addr+fd->skip,
|
|
|
|
FDBLK, fdc->dmachan);
|
|
|
|
if (fdc->status[0]&0xF8)
|
|
|
|
{
|
|
|
|
return(retrier(fdcu));
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
/* All OK */
|
1993-06-18 10:19:16 +04:00
|
|
|
fd->skip += FDBLK;
|
|
|
|
if (fd->skip < bp->b_bcount)
|
|
|
|
{
|
|
|
|
/* set up next transfer */
|
|
|
|
blknum = (unsigned long)bp->b_blkno*DEV_BSIZE/FDBLK
|
|
|
|
+ fd->skip/FDBLK;
|
|
|
|
bp->b_cylin = (blknum / (fd->ft->sectrac * fd->ft->heads));
|
|
|
|
fdc->state = DOSEEK;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
1993-03-21 12:45:37 +03:00
|
|
|
/* ALL DONE */
|
1993-06-18 10:19:16 +04:00
|
|
|
fd->skip = 0;
|
1993-03-21 12:45:37 +03:00
|
|
|
bp->b_resid = 0;
|
1994-02-06 13:00:30 +03:00
|
|
|
dp->b_actf = bp->b_actf;
|
1993-03-21 12:45:37 +03:00
|
|
|
biodone(bp);
|
1993-06-18 10:19:16 +04:00
|
|
|
fdc->fd = (fd_p) 0;
|
|
|
|
fdc->fdu = -1;
|
|
|
|
fdc->state = FINDWORK;
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
1993-06-18 10:19:16 +04:00
|
|
|
return(1);
|
|
|
|
case RESETCTLR:
|
1993-03-21 12:45:37 +03:00
|
|
|
/* Try a reset, keep motor on */
|
1993-06-18 10:19:16 +04:00
|
|
|
set_motor(fdcu,fd->fdsu,1);
|
1994-03-06 20:18:43 +03:00
|
|
|
delay(100);
|
1993-06-18 10:19:16 +04:00
|
|
|
set_motor(fdcu,fd->fdsu,0);
|
|
|
|
outb(fdc->baseport+fdctl,fd->ft->trans);
|
|
|
|
TRACE1("[0x%x->fdctl]",fd->ft->trans);
|
|
|
|
fdc->retry++;
|
|
|
|
fdc->state = STARTRECAL;
|
1993-03-21 12:45:37 +03:00
|
|
|
break;
|
1993-06-18 10:19:16 +04:00
|
|
|
case STARTRECAL:
|
|
|
|
out_fdc(fdcu,NE7CMD_SPECIFY); /* specify command */
|
|
|
|
out_fdc(fdcu,0xDF);
|
|
|
|
out_fdc(fdcu,2);
|
|
|
|
out_fdc(fdcu,NE7CMD_RECAL); /* Recalibrate Function */
|
|
|
|
out_fdc(fdcu,fdu);
|
|
|
|
fdc->state = RECALWAIT;
|
|
|
|
return(0); /* will return later */
|
|
|
|
case RECALWAIT:
|
1993-03-21 12:45:37 +03:00
|
|
|
/* allow heads to settle */
|
1993-07-06 10:06:26 +04:00
|
|
|
timeout((timeout_t)fd_pseudointr, (caddr_t)fdcu, hz/30);
|
1993-06-18 10:19:16 +04:00
|
|
|
fdc->state = RECALCOMPLETE;
|
|
|
|
return(0); /* will return later */
|
|
|
|
case RECALCOMPLETE:
|
|
|
|
out_fdc(fdcu,NE7CMD_SENSEI);
|
|
|
|
st0 = in_fdc(fdcu);
|
|
|
|
cyl = in_fdc(fdcu);
|
|
|
|
if (cyl != 0)
|
|
|
|
{
|
|
|
|
printf("fd%d: recal failed ST0 %b cyl %d\n", fdu,
|
|
|
|
st0, NE7_ST0BITS, cyl);
|
|
|
|
return(retrier(fdcu));
|
|
|
|
}
|
|
|
|
fd->track = 0;
|
|
|
|
/* Seek (probably) necessary */
|
|
|
|
fdc->state = DOSEEK;
|
|
|
|
return(1); /* will return immediatly */
|
|
|
|
case MOTORWAIT:
|
|
|
|
if(fd->flags & FD_MOTOR_WAIT)
|
|
|
|
{
|
|
|
|
return(0); /* time's not up yet */
|
|
|
|
}
|
|
|
|
fdc->state = DOSEEK;
|
|
|
|
return(1); /* will return immediatly */
|
1993-03-21 12:45:37 +03:00
|
|
|
default:
|
|
|
|
printf("Unexpected FD int->");
|
1993-06-18 10:19:16 +04:00
|
|
|
out_fdc(fdcu,NE7CMD_SENSEI);
|
|
|
|
st0 = in_fdc(fdcu);
|
|
|
|
cyl = in_fdc(fdcu);
|
1993-03-21 12:45:37 +03:00
|
|
|
printf("ST0 = %lx, PCN = %lx\n",i,sec);
|
1993-06-18 10:19:16 +04:00
|
|
|
out_fdc(fdcu,0x4A);
|
|
|
|
out_fdc(fdcu,fd->fdsu);
|
1993-03-21 12:45:37 +03:00
|
|
|
for(i=0;i<7;i++) {
|
1993-06-18 10:19:16 +04:00
|
|
|
fdc->status[i] = in_fdc(fdcu);
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
printf("intr status :%lx %lx %lx %lx %lx %lx %lx ",
|
1993-06-18 10:19:16 +04:00
|
|
|
fdc->status[0],
|
|
|
|
fdc->status[1],
|
|
|
|
fdc->status[2],
|
|
|
|
fdc->status[3],
|
|
|
|
fdc->status[4],
|
|
|
|
fdc->status[5],
|
|
|
|
fdc->status[6] );
|
|
|
|
return(0);
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
1993-06-18 10:19:16 +04:00
|
|
|
return(1); /* Come back immediatly to new state */
|
|
|
|
}
|
|
|
|
|
|
|
|
retrier(fdcu_t fdcu)
|
|
|
|
{
|
|
|
|
fdc_p fdc = fdc_data + fdcu;
|
|
|
|
register struct buf *dp,*bp;
|
|
|
|
|
|
|
|
dp = &(fdc->head);
|
|
|
|
bp = dp->b_actf;
|
|
|
|
|
|
|
|
switch(fdc->retry)
|
|
|
|
{
|
|
|
|
case 0: case 1: case 2:
|
|
|
|
fdc->state = SEEKCOMPLETE;
|
|
|
|
break;
|
|
|
|
case 3: case 4: case 5:
|
|
|
|
fdc->state = STARTRECAL;
|
1993-03-21 12:45:37 +03:00
|
|
|
break;
|
|
|
|
case 6:
|
1993-06-18 10:19:16 +04:00
|
|
|
fdc->state = RESETCTLR;
|
|
|
|
break;
|
1993-03-21 12:45:37 +03:00
|
|
|
case 7:
|
|
|
|
break;
|
|
|
|
default:
|
1993-06-18 10:19:16 +04:00
|
|
|
{
|
|
|
|
printf("fd%d: hard error (ST0 %b ",
|
|
|
|
fdc->fdu, fdc->status[0], NE7_ST0BITS);
|
|
|
|
printf(" ST1 %b ", fdc->status[1], NE7_ST1BITS);
|
|
|
|
printf(" ST2 %b ", fdc->status[2], NE7_ST2BITS);
|
|
|
|
printf(" ST3 %b ", fdc->status[3], NE7_ST3BITS);
|
|
|
|
printf("cyl %d hd %d sec %d)\n",
|
|
|
|
fdc->status[4], fdc->status[5], fdc->status[6]);
|
|
|
|
}
|
|
|
|
bp->b_flags |= B_ERROR;
|
|
|
|
bp->b_error = EIO;
|
|
|
|
bp->b_resid = bp->b_bcount - fdc->fd->skip;
|
1994-02-06 13:00:30 +03:00
|
|
|
dp->b_actf = bp->b_actf;
|
1993-06-18 10:19:16 +04:00
|
|
|
fdc->fd->skip = 0;
|
|
|
|
biodone(bp);
|
|
|
|
fdc->state = FINDWORK;
|
|
|
|
fdc->fd = (fd_p) 0;
|
|
|
|
fdc->fdu = -1;
|
|
|
|
return(1);
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
1993-06-18 10:19:16 +04:00
|
|
|
fdc->retry++;
|
|
|
|
return(1);
|
1993-03-21 12:45:37 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
1993-06-18 10:19:16 +04:00
|
|
|
|