1993-09-10 03:53:45 +04:00
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/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)com.c 7.5 (Berkeley) 5/16/91
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1993-09-13 11:25:06 +04:00
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* $Id: scn.c,v 1.2 1993/09/13 07:25:06 phil Exp $
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1993-09-10 03:53:45 +04:00
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*/
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#include "scn.h"
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#if NSCN > 0
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/* The pc532 has 4 duarts! */
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#define NLINES 8
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/*
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* scn2681 driver for the pc532. Phil Nelson Feb 8, 1993
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*
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*/
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#include "param.h"
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#include "systm.h"
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#include "ioctl.h"
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#include "select.h"
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#include "tty.h"
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#include "proc.h"
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#include "user.h"
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#include "conf.h"
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#include "file.h"
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#include "uio.h"
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#include "kernel.h"
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#include "syslog.h"
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#include "types.h"
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#include "device.h"
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#include "scnreg.h"
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#include "../pc532/icu.h"
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#include "sl.h"
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int scnprobe(), scnattach(), scnintr(), scnstart(), scnparam();
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struct pc532_driver scndriver = {
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scnprobe, scnattach, "scn"
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};
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int scnsoftCAR;
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int scn_active;
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/* int nlines = NLINES; */
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int scnconsole = SCN_CONSOLE;
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int scnconsinit;
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int scndefaultrate = TTYDEF_SPEED;
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int scnmajor;
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struct duart_info uart[(NLINES+1)/2];
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struct rs232_s line[NLINES];
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struct tty *scn_tty[NLINES];
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struct speedtab scnspeedtab[] = {
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0, 0x40, /* code for line-hangup */
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50, 0x00,
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75, 0x10,
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110, 0x21,
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134, 0x22,
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150, 0x13,
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200, 0x03,
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300, 0x24,
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600, 0x25,
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1050, 0x07,
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1200, 0x26,
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1800, 0x1a,
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2000, 0x17,
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2400, 0x28,
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4800, 0x29,
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7200, 0x0a,
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9600, 0x2b,
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19200, 0x1c,
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38400, 0x0c,
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57600, 0x60, /* An illegal speed....? */
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-1, -1
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};
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#define getspeedcode(sp,val) \
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{ int i=0; \
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while (scnspeedtab[i].sp_speed != -1 && \
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scnspeedtab[i].sp_speed != sp) \
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i++; \
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val = scnspeedtab[i].sp_code; \
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}
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/* Unit is 0-7. Other parts of the minor number are things like
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hardware cts/rts handshaking. */
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#define UNIT(x) (minor(x) & 0x7)
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/* Which uart is the device on? */
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#define UART(x) (UNIT(x) >> 1)
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extern struct tty *constty;
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#ifdef KGDB
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#include "machine/remote-sl.h"
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extern int kgdb_dev;
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extern int kgdb_rate;
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extern int kgdb_debug_init;
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#endif
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/* Debug routine to print out the rs line structures. */
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void print_rs(int unit)
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{
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struct rs232_s *rs = &line[unit];
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printf ("\nline frame overrun parity break\n");
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printf ("tty%1d state=%2x f=%2d o=%2d p=%2d b=%2d in=%x, out=%x grp=%d\n",
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unit, rs->framing_errors, rs->overrun_errors,
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rs->parity_errors, rs->break_interrupts,
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rs->uart->i_speed[rs->a_or_b], rs->uart->o_speed[rs->a_or_b],
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rs->uart->speed_grp);
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}
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/*==========================================================================*
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* scn_config *
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*==========================================================================*/
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static
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int scn_config(unit, in_speed, out_speed, parity, stop_bits, data_bits )
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int unit; /* which rs line */
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int in_speed; /* input speed: 110, 300, 1200, etc */
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int out_speed; /* output speed: 110, 300, 1200, etc */
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int parity; /* some parity */
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int stop_bits; /* 2 (110 baud) or 1 (other speeds) */
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int data_bits; /* 5, 6, 7, or 8 */
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{
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/* Set various line control parameters for RS232 I/O. */
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register struct rs232_s *rs;
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char mr1_val, mr2_val;
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int sp_grp, sp_both;
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char set_speed; /* Non zero if we need to set the speed. */
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char a_or_b; /* Used for ease of access. */
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int in_code;
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int out_code;
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int x;
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/* Get the speed codes. */
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getspeedcode(in_speed,in_code);
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getspeedcode(out_speed,out_code);
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/* Check for speed errors. */
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if (in_code == -1 || out_code == -1)
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return (EINVAL);
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/* Set up rs pointer. */
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rs = &line[unit];
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a_or_b = rs->a_or_b;
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/* Check out the Speeds. There are two groups of speeds. If the new
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speeds are not in the same group, or the other line is not the same
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speed of the other group, do not change the speeds. Also, if the
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in speed and the out speed are in different groups, use the in speed. */
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set_speed = FALSE;
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if ( (in_code != rs->uart->i_code[a_or_b])
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|| (out_code != rs->uart->o_code[a_or_b])) {
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/* We need to set the speeds .*/
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set_speed = TRUE;
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if ( ((in_code & LC_SP_GRP) != (out_code & LC_SP_GRP))
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&& (((in_code | out_code) & LC_SP_BOTH) != 1) ) {
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/* Input speed and output speed are different groups. */
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return (EINVAL);
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}
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sp_grp = ((in_code | out_code) & LC_SP_GRP)>>4;
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sp_both = in_code & out_code & LC_SP_BOTH;
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/* Check for compatibility and set the uart values */
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if (sp_both)
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sp_grp = rs->uart->speed_grp;
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else
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if ((sp_grp != rs->uart->speed_grp)
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&& !(rs->uart->i_code[1-a_or_b] & rs->uart->o_code[1-a_or_b]
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& LC_SP_BOTH)) {
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/* Can't change group, don`t change the speed rates. */
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return (EINVAL);
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}
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rs->uart->i_code[a_or_b] = in_code;
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rs->uart->o_code[a_or_b] = out_code;
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rs->uart->i_speed[a_or_b] = in_speed;
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rs->uart->o_speed[a_or_b] = out_speed;
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}
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/* Lock out interrupts while setting the parameters. (Just for safety.)
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*/
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x=spltty();
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WR_ADR (u_char, rs->cmd_port, CMD_MR1);
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mr1_val = RD_ADR (u_char, rs->mr_port);
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mr2_val = RD_ADR (u_char, rs->mr_port);
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if ((((mr1_val & 0xe0) | parity | data_bits) != mr1_val) ||
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(((mr2_val & 0xf0) | stop_bits) != mr2_val)) {
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WR_ADR (u_char, rs->cmd_port, CMD_MR1);
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WR_ADR (u_char, rs->mr_port, (mr1_val & 0xe0) | parity | data_bits);
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WR_ADR (u_char, rs->mr_port, (mr2_val & 0xf0) | stop_bits);
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}
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if (set_speed) {
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if (rs->uart->speed_grp != sp_grp) {
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/* Change the group! */
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rs->uart->speed_grp = sp_grp;
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WR_ADR (u_char, rs->acr_port, (sp_grp << 7) | rs->uart->acr_int_bits);
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}
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WR_ADR (u_char, rs->speed_port, ((in_code & 0x0f) << 4)
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| (out_code & 0x0f));
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}
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DELAY(96000/out_speed);
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splx(x);
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return (0);
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}
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scnprobe(dev)
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struct pc532_device *dev;
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{
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int unit = UNIT(dev->pd_unit);
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/* Should do more ???? */
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if (unit < NLINES) {
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switch (unit) {
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case 0:
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case 1: PL_tty |= SPL_UART0; break;
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case 2:
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case 3: PL_tty |= SPL_UART1; break;
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case 4:
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case 5: PL_tty |= SPL_UART2; break;
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case 6:
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case 7: PL_tty |= SPL_UART3; break;
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}
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PL_zero |= PL_tty;
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#if NSL > 0
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PL_net |= PL_tty;
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PL_tty |= PL_net;
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#endif
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return(1); /* if dev is "working." */
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} else {
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return(0); /* if dev is "not working." */
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}
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}
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int
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scnattach(dp)
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struct pc532_device *dp;
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{
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struct tty *tp;
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u_char unit = UNIT(dp->pd_unit);
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u_char duart = unit >> 1;
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register struct rs232_s *rs = &line[unit];
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int x;
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int speed;
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long line_base;
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long uart_base;
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long scn_first_adr;
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if (unit == 0) DELAY(5); /* Let the output go out.... */
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scn_active |= 1 << unit;
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scnsoftCAR |= 1 << unit; /* XXX */
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/* Record unit number, uart, channel a_or_b. */
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rs->unit = unit;
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rs->uart = &uart[unit>>1];
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rs->a_or_b = unit % 2;
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/* Precalculate port numbers for speed. Magic numbers in the code (once). */
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scn_first_adr = SCN_FIRST_MAP_ADR; /* to get around a gcc bug. */
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line_base = scn_first_adr + LINE_SZ * unit;
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uart_base = scn_first_adr + UART_SZ * duart;
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rs->xmit_port = DATA_ADR;
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rs->recv_port = DATA_ADR;
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rs->mr_port = MR_ADR;
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rs->stat_port = STAT_ADR;
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rs->speed_port = SPEED_ADR;
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rs->cmd_port = CMD_ADR;
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rs->acr_port = ACR_ADR;
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rs->ip_port = IP_ADR;
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rs->opset_port = SET_OP_ADR;
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rs->opclr_port = CLR_OP_ADR;
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/* Initialize error counts */
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rs->framing_errors = 0;
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rs->overrun_errors = 0;
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rs->parity_errors = 0;
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rs->break_interrupts = 0;
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/* Set up the hardware to a base state, in particular
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* o reset transmitter and receiver
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* o set speeds and configurations
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* o receiver interrupts only (RxRDY and BREAK)
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*/
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x = spltty();
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istop(rs); /* CTS off... */
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WR_ADR (u_char, rs->cmd_port, CMD_DIS_RX | CMD_DIS_TX);
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WR_ADR (u_char, rs->cmd_port, CMD_RESET_RX);
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WR_ADR (u_char, rs->cmd_port, CMD_RESET_TX);
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WR_ADR (u_char, rs->cmd_port, CMD_RESET_ERR);
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WR_ADR (u_char, rs->cmd_port, CMD_RESET_BRK);
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WR_ADR (u_char, rs->cmd_port, CMD_MR1);
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WR_ADR (u_char, rs->mr_port, 0); /* No receiver control of RTS. */
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WR_ADR (u_char, rs->mr_port, 0);
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#if 0
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WR_ADR (u_char, rs->mr_port, 0x80); /* Enable receiver control of RTS */
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WR_ADR (u_char, rs->mr_port, 0x10); /* Enable CTS transmitter control */
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#endif
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/* Initialize the uart structure if this is channel A. */
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if (rs->a_or_b == 0) {
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/* uart ports */
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rs->uart->isr_port = ISR_ADR;
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rs->uart->imr_port = IMR_ADR;
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rs->uart->ipcr_port = IPCR_ADR;
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rs->uart->opcr_port = OPCR_ADR;
|
|
|
|
|
|
|
|
/* Disable all interrupts. */
|
|
|
|
WR_ADR (u_char, rs->uart->imr_port, 0);
|
|
|
|
rs->uart->imr_int_bits = 0;
|
|
|
|
|
|
|
|
/* Output port config */
|
|
|
|
WR_ADR (u_char, rs->uart->opcr_port, 0);
|
|
|
|
|
|
|
|
/* Speeds... */
|
|
|
|
rs->uart->speed_grp = 1;
|
|
|
|
rs->uart->acr_int_bits = 0;
|
|
|
|
/* Set initial speed to an illegal code that can be changed to
|
|
|
|
any other baud. */
|
|
|
|
rs->uart->i_code[0] = rs->uart->o_code[0] =
|
|
|
|
rs->uart->i_code[1] = rs->uart->o_code[1] = 0x2f;
|
|
|
|
rs->uart->i_speed[0] = rs->uart->o_speed[0] =
|
|
|
|
rs->uart->i_speed[1] = rs->uart->o_speed[1] = 0x0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
rs->uart->acr_int_bits |= ACR_CTS << rs->a_or_b; /* Set CTS int */
|
|
|
|
#endif
|
|
|
|
WR_ADR (u_char, rs->acr_port,
|
|
|
|
(rs->uart->speed_grp << 7) | rs->uart->acr_int_bits);
|
|
|
|
scn_config(unit, TTYDEF_SPEED, TTYDEF_SPEED,
|
|
|
|
LC_NONE, LC_STOP1, LC_BITS8);
|
|
|
|
|
|
|
|
/* Turn on the Rx and Tx. */
|
|
|
|
WR_ADR (u_char, rs->cmd_port, CMD_ENA_RX | CMD_ENA_TX);
|
|
|
|
|
|
|
|
/* Set up the interrupts. */
|
|
|
|
rs->uart->imr_int_bits
|
|
|
|
|= (/*IMR_RX_INT | IMR_TX_INT |*/ IMR_BRK_INT) << (4*rs->a_or_b) | IMR_IP_INT;
|
|
|
|
WR_ADR (u_char, rs->uart->imr_port, rs->uart->imr_int_bits);
|
|
|
|
|
|
|
|
splx(x);
|
|
|
|
|
|
|
|
#ifdef KGDB
|
|
|
|
if (kgdb_dev == makedev(scnmajor, unit+1)) {
|
|
|
|
if (scnconsole == unit)
|
|
|
|
kgdb_dev = -1; /* can't debug over console port */
|
|
|
|
else {
|
|
|
|
(void) scninit(unit, kgdb_rate);
|
|
|
|
if (kgdb_debug_init) {
|
|
|
|
/*
|
|
|
|
* Print prefix of device name,
|
|
|
|
* let kgdb_connect print the rest.
|
|
|
|
*/
|
|
|
|
printf("scn%d: ", unit);
|
|
|
|
kgdb_connect(1);
|
|
|
|
} else
|
|
|
|
printf("scn%d: kgdb enabled\n", unit);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* ARGSUSED */
|
|
|
|
scnopen(dev_t dev, int flag, int mode, struct proc *p)
|
|
|
|
{
|
|
|
|
register struct tty *tp;
|
|
|
|
register int unit = UNIT(dev);
|
|
|
|
register struct rs232_s *rs = &line[unit];
|
|
|
|
int error = 0;
|
|
|
|
|
|
|
|
if (unit >= NLINES || (scn_active & (1 << unit)) == 0)
|
|
|
|
return (ENXIO);
|
|
|
|
if(!scn_tty[unit]) {
|
|
|
|
tp = scn_tty[unit] = ttymalloc();
|
|
|
|
} else
|
|
|
|
tp = scn_tty[unit];
|
|
|
|
tp->t_oproc = scnstart;
|
|
|
|
tp->t_param = scnparam;
|
|
|
|
tp->t_dev = dev;
|
|
|
|
if ((tp->t_state & TS_ISOPEN) == 0) {
|
|
|
|
tp->t_state |= TS_WOPEN;
|
|
|
|
ttychars(tp);
|
|
|
|
if (tp->t_ispeed == 0) {
|
|
|
|
tp->t_iflag = TTYDEF_IFLAG;
|
|
|
|
tp->t_oflag = TTYDEF_OFLAG;
|
|
|
|
tp->t_cflag = TTYDEF_CFLAG;
|
|
|
|
tp->t_lflag = TTYDEF_LFLAG;
|
|
|
|
tp->t_ispeed = tp->t_ospeed = scndefaultrate;
|
|
|
|
}
|
|
|
|
scnparam(tp, &tp->t_termios);
|
|
|
|
ttsetwater(tp);
|
|
|
|
|
|
|
|
/* Turn on DTR and RTS. */
|
|
|
|
istart(rs);
|
|
|
|
rx_ints_on (rs);
|
|
|
|
} else if (tp->t_state&TS_XCLUDE && p->p_ucred->cr_uid != 0)
|
|
|
|
return (EBUSY);
|
|
|
|
(void) spltty();
|
|
|
|
|
|
|
|
if ((scnsoftCAR & (1 << unit)) || get_dcd(rs))
|
|
|
|
tp->t_state |= TS_CARR_ON;
|
|
|
|
while ((flag&O_NONBLOCK) == 0 && (tp->t_cflag&CLOCAL) == 0 &&
|
|
|
|
(tp->t_state & TS_CARR_ON) == 0) {
|
|
|
|
tp->t_state |= TS_WOPEN;
|
|
|
|
if (error = ttysleep(tp, (caddr_t)&tp->t_rawq, TTIPRI | PCATCH,
|
|
|
|
ttopen, 0))
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
(void) spl0();
|
|
|
|
if (error == 0)
|
|
|
|
error = (*linesw[tp->t_line].l_open)(dev, tp);
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*ARGSUSED*/
|
|
|
|
scnclose(dev, flag, mode, p)
|
|
|
|
dev_t dev;
|
|
|
|
int flag, mode;
|
|
|
|
struct proc *p;
|
|
|
|
{
|
|
|
|
register scn;
|
|
|
|
register int unit = UNIT(dev);
|
|
|
|
register struct tty *tp = scn_tty[unit];
|
|
|
|
register struct rs232_s *rs = &line[unit];
|
|
|
|
|
|
|
|
(*linesw[tp->t_line].l_close)(tp, flag);
|
|
|
|
#ifdef KGDB
|
|
|
|
/* do not disable interrupts if debugging */
|
|
|
|
if (kgdb_dev != makedev(scnmajor, unit))
|
|
|
|
#endif
|
|
|
|
if ((tp->t_state&TS_ISOPEN) == 0)
|
|
|
|
rx_ints_off (rs);
|
|
|
|
if (tp->t_cflag&HUPCL || tp->t_state&TS_WOPEN ||
|
|
|
|
(tp->t_state&TS_ISOPEN) == 0) {
|
|
|
|
WR_ADR (u_char, rs->opclr_port, DTR_BIT << rs->a_or_b);
|
|
|
|
DELAY (10);
|
|
|
|
WR_ADR (u_char, rs->opset_port, DTR_BIT << rs->a_or_b);
|
|
|
|
}
|
1993-09-13 11:25:06 +04:00
|
|
|
if ((tp->t_state&TS_ISOPEN) == 0) {
|
|
|
|
ttyclose(tp);
|
|
|
|
ttyfree(tp);
|
|
|
|
scn_tty[unit] = (struct tty *)NULL;
|
|
|
|
}
|
1993-09-10 03:53:45 +04:00
|
|
|
return(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
scnread(dev, uio, flag)
|
|
|
|
dev_t dev;
|
|
|
|
struct uio *uio;
|
|
|
|
{
|
|
|
|
register struct tty *tp = scn_tty[UNIT(dev)];
|
|
|
|
|
|
|
|
return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
|
|
|
|
}
|
|
|
|
|
|
|
|
scnwrite(dev, uio, flag)
|
|
|
|
dev_t dev;
|
|
|
|
struct uio *uio;
|
|
|
|
{
|
|
|
|
int unit = UNIT(dev);
|
|
|
|
register struct tty *tp = scn_tty[unit];
|
|
|
|
|
|
|
|
return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
|
|
|
|
}
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
scnintr(int uart_no)
|
|
|
|
{
|
|
|
|
int line0 = uart_no << 1;
|
|
|
|
int line1 = (uart_no << 1)+1;
|
|
|
|
|
|
|
|
register struct tty *tp0 = scn_tty[line0];
|
|
|
|
register struct tty *tp1 = scn_tty[line1];
|
|
|
|
|
|
|
|
register struct rs232_s *rs0 = &line[line0];
|
|
|
|
register struct rs232_s *rs1 = &line[line1];
|
|
|
|
register struct duart_info *uart = rs0->uart;
|
|
|
|
|
|
|
|
char rs_work = TRUE;
|
|
|
|
|
|
|
|
u_char rs_stat;
|
|
|
|
u_char rs_ipcr;
|
|
|
|
u_char ch;
|
|
|
|
|
|
|
|
|
|
|
|
rs_stat = RD_ADR(u_char, uart->isr_port);
|
|
|
|
printf ("scnintr, rs_stat = 0x%x\n", rs_stat);
|
|
|
|
|
|
|
|
if (rs_stat & IMR_BRK_INT) {
|
|
|
|
/* A break interrupt! */
|
|
|
|
rs0->lstatus = RD_ADR(u_char, rs0->stat_port);
|
|
|
|
printf ("lstatus = 0x%x\n", rs0->lstatus);
|
|
|
|
if (rs0->lstatus & SR_BREAK) {
|
|
|
|
++rs0->break_interrupts;
|
|
|
|
RD_ADR(u_char, rs0->recv_port); /* Toss zero character. */
|
|
|
|
rs_stat &= ~IMR_RX_INT;
|
|
|
|
}
|
|
|
|
WR_ADR (u_char, rs0->cmd_port, CMD_RESET_BRK);
|
|
|
|
rs0->lstatus = RD_ADR(u_char, rs0->stat_port);
|
|
|
|
printf ("lstatus = 0x%x\n", rs0->lstatus);
|
|
|
|
}
|
|
|
|
if (rs_stat & IMR_RX_INT) {
|
|
|
|
ch = RD_ADR(u_char, rs0->recv_port);
|
|
|
|
printf ("input ch = \"%c\"\n", ch);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* Change this for real interrupts! */
|
|
|
|
_scnintr(int uart_no)
|
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
/* Change this for real interrupts! */
|
|
|
|
scnintr(int uart_no)
|
|
|
|
#endif
|
|
|
|
{
|
|
|
|
int line0 = uart_no << 1;
|
|
|
|
int line1 = (uart_no << 1)+1;
|
|
|
|
|
|
|
|
register struct tty *tp0 = scn_tty[line0];
|
|
|
|
register struct tty *tp1 = scn_tty[line1];
|
|
|
|
|
|
|
|
register struct rs232_s *rs0 = &line[line0];
|
|
|
|
register struct rs232_s *rs1 = &line[line1];
|
|
|
|
register struct duart_info *uart = rs0->uart;
|
|
|
|
|
|
|
|
char rs_work = TRUE;
|
|
|
|
|
|
|
|
u_char rs_stat;
|
|
|
|
u_char rs_ipcr;
|
|
|
|
u_char ch;
|
|
|
|
|
|
|
|
while (rs_work) {
|
|
|
|
/* Loop to pick up ALL pending interrupts for device.
|
|
|
|
*/
|
|
|
|
rs_work = FALSE;
|
|
|
|
rs_stat = RD_ADR(u_char, uart->isr_port);
|
|
|
|
/* if (rs_stat & ~(IMR_TX_INT | IMR_TXB_INT)) printf ("scn intr rs_stat = 0x%x\n", rs_stat); */
|
|
|
|
if ((rs_stat & IMR_TX_INT) && (tp0 != NULL)
|
|
|
|
&& (tp0->t_state & TS_BUSY)) {
|
|
|
|
/* output char done. */
|
|
|
|
tp0->t_state &=~ (TS_BUSY|TS_FLUSH);
|
|
|
|
tx_ints_off(rs0);
|
|
|
|
if (tp0->t_line)
|
|
|
|
(*linesw[tp0->t_line].l_start)(tp0);
|
|
|
|
else
|
|
|
|
scnstart(tp0);
|
|
|
|
rs_work = TRUE;
|
|
|
|
}
|
|
|
|
if (rs_stat & IMR_BRK_INT && (tp0 != NULL)) {
|
|
|
|
/* A break interrupt! */
|
|
|
|
rs0->lstatus = RD_ADR(u_char, rs0->stat_port);
|
|
|
|
if (rs0->lstatus & SR_BREAK) {
|
|
|
|
++rs0->break_interrupts;
|
|
|
|
}
|
|
|
|
RD_ADR(u_char, rs0->recv_port); /* Toss zero character. */
|
|
|
|
rs_stat &= ~IMR_RX_INT;
|
|
|
|
WR_ADR (u_char, rs0->cmd_port, CMD_RESET_BRK);
|
|
|
|
rs_work = TRUE;
|
|
|
|
}
|
|
|
|
if (rs_stat & IMR_RX_INT && (tp0 != NULL)) {
|
|
|
|
ch = RD_ADR(u_char, rs0->recv_port);
|
|
|
|
if (tp0->t_state & TS_ISOPEN)
|
|
|
|
(*linesw[tp0->t_line].l_rint)(ch, tp0);
|
|
|
|
rs_work = TRUE;
|
|
|
|
}
|
|
|
|
if ((rs_stat & IMR_TXB_INT) && (tp1 != NULL)
|
|
|
|
&& (tp1->t_state & TS_BUSY)) {
|
|
|
|
/* output char done. */
|
|
|
|
tp1->t_state &=~ (TS_BUSY|TS_FLUSH);
|
|
|
|
if (tp1->t_line)
|
|
|
|
(*linesw[tp1->t_line].l_start)(tp1);
|
|
|
|
else
|
|
|
|
scnstart(tp1);
|
|
|
|
rs_work = TRUE;
|
|
|
|
}
|
|
|
|
if (rs_stat & IMR_BRKB_INT && (tp1 != NULL)) {
|
|
|
|
/* A break interrupt! */
|
|
|
|
rs1->lstatus = RD_ADR(u_char, rs1->stat_port);
|
|
|
|
if (rs1->lstatus & SR_BREAK) {
|
|
|
|
++rs1->break_interrupts;
|
|
|
|
}
|
|
|
|
RD_ADR(u_char, rs1->recv_port); /* Toss zero character. */
|
|
|
|
WR_ADR (u_char, rs1->cmd_port, CMD_RESET_BRK);
|
|
|
|
rs_stat &= ~IMR_RXB_INT;
|
|
|
|
rs_work = TRUE;
|
|
|
|
}
|
|
|
|
if (rs_stat & IMR_RXB_INT && (tp1 != NULL)) {
|
|
|
|
ch = RD_ADR(u_char, rs1->recv_port);
|
|
|
|
if (tp1->t_state & TS_ISOPEN)
|
|
|
|
(*linesw[tp1->t_line].l_rint)(ch, tp1);
|
|
|
|
rs_work = TRUE;
|
|
|
|
}
|
|
|
|
if (rs_stat & IMR_IP_INT) {
|
|
|
|
rs_work = TRUE;
|
|
|
|
rs_ipcr = RD_ADR (u_char, uart->ipcr_port);
|
|
|
|
#if 0
|
|
|
|
/* RTS/CTS stuff! */
|
|
|
|
if (rs_ipcr & IPCR_CTS)
|
|
|
|
cts_int(rs0);
|
|
|
|
if (rs_ipcr & (IPCR_CTS << 1))
|
|
|
|
cts_int(rs1);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
386 comintr body. --------------
|
|
|
|
register com;
|
|
|
|
register u_char code;
|
|
|
|
register struct tty *tp;
|
|
|
|
|
|
|
|
unit--;
|
|
|
|
com = com_addr[unit];
|
|
|
|
while (1) {
|
|
|
|
code = inb(com+com_iir);
|
|
|
|
switch (code & IIR_IMASK) {
|
|
|
|
case IIR_NOPEND:
|
|
|
|
return (1);
|
|
|
|
case IIR_RXTOUT:
|
|
|
|
case IIR_RXRDY:
|
|
|
|
tp = com_tty[unit];
|
|
|
|
/*
|
|
|
|
* Process received bytes. Inline for speed...
|
|
|
|
*/
|
|
|
|
#ifdef KGDB
|
|
|
|
#define RCVBYTE() \
|
|
|
|
code = inb(com+com_data); \
|
|
|
|
if ((tp->t_state & TS_ISOPEN) == 0) { \
|
|
|
|
if (kgdb_dev == makedev(commajor, unit+1) && \
|
|
|
|
code == FRAME_END) \
|
|
|
|
kgdb_connect(0); /* trap into kgdb */ \
|
|
|
|
} else \
|
|
|
|
(*linesw[tp->t_line].l_rint)(code, tp)
|
|
|
|
#else
|
|
|
|
#define RCVBYTE() \
|
|
|
|
code = inb(com+com_data); \
|
|
|
|
if (tp->t_state & TS_ISOPEN) \
|
|
|
|
(*linesw[tp->t_line].l_rint)(code, tp)
|
|
|
|
#endif
|
|
|
|
|
|
|
|
RCVBYTE();
|
|
|
|
|
|
|
|
if (com_hasfifo & (1 << unit))
|
|
|
|
while ((code = inb(com+com_lsr)) & LSR_RCV_MASK) {
|
|
|
|
if (code == LSR_RXRDY) {
|
|
|
|
RCVBYTE();
|
|
|
|
} else
|
|
|
|
comeint(unit, code, com);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case IIR_TXRDY:
|
|
|
|
tp = com_tty[unit];
|
|
|
|
tp->t_state &=~ (TS_BUSY|TS_FLUSH);
|
|
|
|
if (tp->t_line)
|
|
|
|
(*linesw[tp->t_line].l_start)(tp);
|
|
|
|
else
|
|
|
|
comstart(tp);
|
|
|
|
break;
|
|
|
|
case IIR_RLS:
|
|
|
|
comeint(unit, inb(com+com_lsr), com);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
if (code & IIR_NOPEND)
|
|
|
|
return (1);
|
|
|
|
log(LOG_WARNING, "com%d: weird interrupt: 0x%x\n",
|
|
|
|
unit, code);
|
|
|
|
/* fall through */
|
|
|
|
case IIR_MLSC:
|
|
|
|
commint(unit, com);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
comeint(unit, stat, com)
|
|
|
|
register int unit, stat;
|
|
|
|
register com;
|
|
|
|
{
|
|
|
|
register struct tty *tp;
|
|
|
|
register int c;
|
|
|
|
|
|
|
|
tp = com_tty[unit];
|
|
|
|
c = inb(com+com_data);
|
|
|
|
if ((tp->t_state & TS_ISOPEN) == 0) {
|
|
|
|
#ifdef KGDB
|
|
|
|
/* we don't care about parity errors */
|
|
|
|
if (((stat & (LSR_BI|LSR_FE|LSR_PE)) == LSR_PE) &&
|
|
|
|
kgdb_dev == makedev(commajor, unit+1) && c == FRAME_END)
|
|
|
|
kgdb_connect(0); /* trap into kgdb */
|
|
|
|
#endif
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (stat & (LSR_BI | LSR_FE))
|
|
|
|
c |= TTY_FE;
|
|
|
|
else if (stat & LSR_PE)
|
|
|
|
c |= TTY_PE;
|
|
|
|
else if (stat & LSR_OE) { /* 30 Aug 92*/
|
|
|
|
c |= TTY_PE; /* Ought to have it's own define... */
|
|
|
|
log(LOG_WARNING, "com%d: silo overflow\n", unit);
|
|
|
|
}
|
|
|
|
(*linesw[tp->t_line].l_rint)(c, tp);
|
|
|
|
}
|
|
|
|
|
|
|
|
commint(unit, com)
|
|
|
|
register int unit;
|
|
|
|
register com;
|
|
|
|
{
|
|
|
|
register struct tty *tp;
|
|
|
|
register int stat;
|
|
|
|
|
|
|
|
tp = com_tty[unit];
|
|
|
|
stat = inb(com+com_msr);
|
|
|
|
if ((stat & MSR_DDCD) && (comsoftCAR & (1 << unit)) == 0) {
|
|
|
|
if (stat & MSR_DCD)
|
|
|
|
(void)(*linesw[tp->t_line].l_modem)(tp, 1);
|
|
|
|
else if ((*linesw[tp->t_line].l_modem)(tp, 0) == 0)
|
|
|
|
outb(com+com_mcr,
|
|
|
|
inb(com+com_mcr) & ~(MCR_DTR | MCR_RTS) | MCR_IENABLE);
|
|
|
|
} else if ((stat & MSR_DCTS) && (tp->t_state & TS_ISOPEN) &&
|
|
|
|
(tp->t_flags & CRTSCTS)) {
|
|
|
|
/* the line is up and we want to do rts/cts flow control */
|
|
|
|
if (stat & MSR_CTS) {
|
|
|
|
tp->t_state &=~ TS_TTSTOP;
|
|
|
|
ttstart(tp);
|
|
|
|
} else
|
|
|
|
tp->t_state |= TS_TTSTOP;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
scnioctl(dev, cmd, data, flag)
|
|
|
|
dev_t dev;
|
|
|
|
caddr_t data;
|
|
|
|
{
|
|
|
|
register struct tty *tp;
|
|
|
|
register int unit = UNIT(dev);
|
|
|
|
register struct rs232_s *rs = &line[unit];
|
|
|
|
register scn;
|
|
|
|
register int error;
|
|
|
|
|
|
|
|
tp = scn_tty[unit];
|
|
|
|
error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag);
|
|
|
|
if (error >= 0)
|
|
|
|
return (error);
|
|
|
|
error = ttioctl(tp, cmd, data, flag);
|
|
|
|
if (error >= 0)
|
|
|
|
return (error);
|
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
|
|
|
|
case TIOCSBRK:
|
|
|
|
WR_ADR(u_char, rs->cmd_port, CMD_START_BRK);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCCBRK:
|
|
|
|
WR_ADR (u_char, rs->cmd_port, CMD_STOP_BRK);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCSDTR:
|
|
|
|
WR_ADR(u_char, rs->opset_port, DTR_BIT << rs->a_or_b);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCCDTR:
|
|
|
|
WR_ADR(u_char, rs->opclr_port, DTR_BIT << rs->a_or_b);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCMSET:
|
|
|
|
/* (void) scnmctl(dev, *(int *)data, DMSET); */
|
|
|
|
rs->scn_bits = *(long *)data;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCMBIS:
|
|
|
|
/* (void) scnmctl(dev, *(int *)data, DMBIS); */
|
|
|
|
rs->scn_bits |= *(int *)data;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCMBIC:
|
|
|
|
/* (void) scnmctl(dev, *(int *)data, DMBIC); */
|
|
|
|
rs->scn_bits &= ~(*(int *)data);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TIOCMGET:
|
|
|
|
/* *(int *)data = scnmctl(dev, 0, DMGET); */
|
|
|
|
*(int *)data = rs->scn_bits;
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
return (ENOTTY);
|
|
|
|
}
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
scnparam(tp, t)
|
|
|
|
register struct tty *tp;
|
|
|
|
register struct termios *t;
|
|
|
|
{
|
|
|
|
int cflag = t->c_cflag;
|
|
|
|
int unit = UNIT(tp->t_dev);
|
|
|
|
int parity = LC_NONE,
|
|
|
|
stop_bits = LC_STOP1,
|
|
|
|
data_bits = LC_BITS8;
|
|
|
|
int error;
|
|
|
|
struct rs232_s *rs = &line[unit];
|
|
|
|
|
|
|
|
/* Is this a hang up? */
|
|
|
|
if (t->c_ospeed == B0) {
|
|
|
|
WR_ADR (u_char, rs->opclr_port, DTR_BIT << rs->a_or_b);
|
|
|
|
DELAY (10);
|
|
|
|
WR_ADR (u_char, rs->opset_port, DTR_BIT << rs->a_or_b);
|
|
|
|
return(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Parity? */
|
|
|
|
if (cflag&PARENB) {
|
|
|
|
if ((cflag&PARODD) == 0)
|
|
|
|
parity = LC_EVEN;
|
|
|
|
else
|
|
|
|
parity = LC_ODD;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Stop bits. */
|
|
|
|
if (cflag&CSTOPB)
|
|
|
|
stop_bits = LC_STOP1;
|
|
|
|
|
|
|
|
/* Data bits. */
|
|
|
|
switch (cflag&CSIZE) {
|
|
|
|
case CS5:
|
|
|
|
data_bits = LC_BITS5; break;
|
|
|
|
case CS6:
|
|
|
|
data_bits = LC_BITS6; break;
|
|
|
|
case CS7:
|
|
|
|
data_bits = LC_BITS7; break;
|
|
|
|
case CS8:
|
|
|
|
data_bits = LC_BITS8; break;
|
|
|
|
}
|
|
|
|
|
|
|
|
error = scn_config (unit, t->c_ispeed, t->c_ospeed, parity, stop_bits,
|
|
|
|
data_bits);
|
|
|
|
|
|
|
|
/* If successful, copy to tty */
|
|
|
|
if (!error) {
|
|
|
|
tp->t_ispeed = t->c_ispeed;
|
|
|
|
tp->t_ospeed = t->c_ospeed;
|
|
|
|
tp->t_cflag = cflag;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
scnstart(tp)
|
|
|
|
register struct tty *tp;
|
|
|
|
{
|
|
|
|
int s, c;
|
|
|
|
int unit = UNIT(tp->t_dev);
|
|
|
|
struct rs232_s *rs = &line[unit];
|
|
|
|
|
|
|
|
s = spltty();
|
|
|
|
if (tp->t_state & (TS_TIMEOUT|TS_TTSTOP))
|
|
|
|
goto out;
|
|
|
|
if (tp->t_outq.c_cc <= tp->t_lowat) {
|
|
|
|
if (tp->t_state&TS_ASLEEP) {
|
|
|
|
tp->t_state &= ~TS_ASLEEP;
|
|
|
|
wakeup((caddr_t)&tp->t_outq);
|
|
|
|
}
|
|
|
|
selwakeup(&tp->t_wsel);
|
|
|
|
}
|
|
|
|
if (tp->t_outq.c_cc == 0)
|
|
|
|
goto out;
|
|
|
|
if (tx_rdy(rs)) {
|
|
|
|
c = getc(&tp->t_outq);
|
|
|
|
tp->t_state |= TS_BUSY;
|
|
|
|
WR_ADR(u_char, rs->xmit_port, c);
|
|
|
|
tx_ints_on(rs);
|
|
|
|
}
|
|
|
|
out:
|
|
|
|
splx(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Stop output on a line.
|
|
|
|
*/
|
|
|
|
/*ARGSUSED*/
|
|
|
|
scnstop(tp, flag)
|
|
|
|
register struct tty *tp;
|
|
|
|
{
|
|
|
|
register int s;
|
|
|
|
|
|
|
|
s = spltty();
|
|
|
|
if (tp->t_state & TS_BUSY) {
|
|
|
|
if ((tp->t_state&TS_TTSTOP)==0)
|
|
|
|
tp->t_state |= TS_FLUSH;
|
|
|
|
}
|
|
|
|
splx(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Following are all routines needed for SCN to act as console
|
|
|
|
*/
|
|
|
|
|
|
|
|
scncnprobe(cp)
|
|
|
|
struct consdev *cp;
|
|
|
|
{
|
|
|
|
#if 0
|
|
|
|
int unit;
|
|
|
|
|
|
|
|
/* locate the major number */
|
|
|
|
for (scnmajor = 0; scnmajor < nchrdev; scnmajor++)
|
|
|
|
if (cdevsw[scnmajor].d_open == scnopen)
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* XXX: ick */
|
|
|
|
unit = CONUNIT;
|
|
|
|
scn_addr[CONUNIT] = CONADDR;
|
|
|
|
|
|
|
|
/* make sure hardware exists? XXX */
|
|
|
|
|
|
|
|
/* initialize required fields */
|
|
|
|
cp->cn_dev = makedev(scnmajor, unit+1);
|
|
|
|
cp->cn_tp = scn_tty[unit];
|
|
|
|
#ifdef SCNCONSOLE
|
|
|
|
cp->cn_pri = CN_REMOTE; /* Force a serial port console */
|
|
|
|
#else
|
|
|
|
cp->cn_pri = CN_NORMAL;
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
scncninit(cp)
|
|
|
|
struct consdev *cp;
|
|
|
|
{
|
|
|
|
#if 0
|
|
|
|
int unit = UNIT(cp->cn_dev);
|
|
|
|
|
|
|
|
scninit(unit, scndefaultrate);
|
|
|
|
scnconsole = unit;
|
|
|
|
scnconsinit = 1;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
scninit(unit, rate)
|
|
|
|
int unit, rate;
|
|
|
|
{
|
|
|
|
#if 0
|
|
|
|
register int scn;
|
|
|
|
int s;
|
|
|
|
short stat;
|
|
|
|
|
|
|
|
#ifdef lint
|
|
|
|
stat = unit; if (stat) return;
|
|
|
|
#endif
|
|
|
|
scn = scn_addr[unit];
|
|
|
|
s = splhigh();
|
|
|
|
outb(com+com_cfcr, CFCR_DLAB);
|
|
|
|
rate = ttspeedtab(comdefaultrate, comspeedtab);
|
|
|
|
outb(com+com_data, rate & 0xFF);
|
|
|
|
outb(com+com_ier, rate >> 8);
|
|
|
|
outb(com+com_cfcr, CFCR_8BITS);
|
|
|
|
outb(com+com_ier, IER_ERXRDY | IER_ETXRDY);
|
|
|
|
outb(com+com_fifo, FIFO_ENABLE|FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_14);
|
|
|
|
stat = inb(com+com_iir);
|
|
|
|
splx(s);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
scncngetc(dev)
|
|
|
|
{
|
|
|
|
#if 0
|
|
|
|
register scn = scn_addr[UNIT(dev)];
|
|
|
|
short stat;
|
|
|
|
int c, s;
|
|
|
|
|
|
|
|
#ifdef lint
|
|
|
|
stat = dev; if (stat) return(0);
|
|
|
|
#endif
|
|
|
|
s = splhigh();
|
|
|
|
while (((stat = inb(com+com_lsr)) & LSR_RXRDY) == 0)
|
|
|
|
;
|
|
|
|
c = inb(com+com_data);
|
|
|
|
stat = inb(com+com_iir);
|
|
|
|
splx(s);
|
|
|
|
return(c);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Console kernel output character routine.
|
|
|
|
*/
|
|
|
|
scncnputc(dev, c)
|
|
|
|
dev_t dev;
|
|
|
|
register int c;
|
|
|
|
{
|
|
|
|
#if 0
|
|
|
|
register com = com_addr[UNIT(dev)];
|
|
|
|
register int timo;
|
|
|
|
short stat;
|
|
|
|
int s = splhigh();
|
|
|
|
|
|
|
|
#ifdef lint
|
|
|
|
stat = dev; if (stat) return;
|
|
|
|
#endif
|
|
|
|
#ifdef KGDB
|
|
|
|
if (dev != kgdb_dev)
|
|
|
|
#endif
|
|
|
|
if (comconsinit == 0) {
|
|
|
|
(void) cominit(UNIT(dev), comdefaultrate);
|
|
|
|
comconsinit = 1;
|
|
|
|
}
|
|
|
|
/* wait for any pending transmission to finish */
|
|
|
|
timo = 50000;
|
|
|
|
while (((stat = inb(com+com_lsr)) & LSR_TXRDY) == 0 && --timo)
|
|
|
|
;
|
|
|
|
outb(com+com_data, c);
|
|
|
|
/* wait for this transmission to complete */
|
|
|
|
timo = 1500000;
|
|
|
|
while (((stat = inb(com+com_lsr)) & LSR_TXRDY) == 0 && --timo)
|
|
|
|
;
|
|
|
|
/* clear any interrupts generated by this transmission */
|
|
|
|
stat = inb(com+com_iir);
|
|
|
|
splx(s);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
scnselect(dev, rw, p)
|
|
|
|
dev_t dev;
|
|
|
|
int rw;
|
|
|
|
struct proc *p;
|
|
|
|
{
|
|
|
|
register struct tty *tp = scn_tty[UNIT(dev)];
|
|
|
|
int nread;
|
|
|
|
int s = spltty();
|
|
|
|
struct proc *selp;
|
|
|
|
|
|
|
|
switch (rw) {
|
|
|
|
|
|
|
|
case FREAD:
|
|
|
|
nread = ttnread(tp);
|
|
|
|
if (nread > 0 ||
|
|
|
|
((tp->t_cflag&CLOCAL) == 0 && (tp->t_state&TS_CARR_ON) == 0))
|
|
|
|
goto win;
|
|
|
|
selrecord(p, &tp->t_rsel);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case FWRITE:
|
|
|
|
if (tp->t_outq.c_cc <= tp->t_lowat)
|
|
|
|
goto win;
|
|
|
|
selrecord(p, &tp->t_wsel);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
splx(s);
|
|
|
|
return (0);
|
|
|
|
win:
|
|
|
|
splx(s);
|
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|