1996-10-11 03:51:21 +04:00
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/* $NetBSD: drsc.c,v 1.5 1996/10/10 23:55:33 christos Exp $ */
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1996-05-10 00:30:30 +04:00
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/*
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* Copyright (c) 1996 Ignatios Souvatzis
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* Copyright (c) 1994 Michael L. Hitch
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* Copyright (c) 1982, 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)dma.c
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <scsi/scsi_all.h>
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#include <scsi/scsiconf.h>
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#include <amiga/amiga/custom.h>
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#include <amiga/amiga/cc.h>
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#include <amiga/amiga/device.h>
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#include <amiga/amiga/isr.h>
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#include <amiga/dev/siopreg.h>
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#include <amiga/dev/siopvar.h>
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#include <amiga/amiga/drcustom.h>
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void drscattach __P((struct device *, struct device *, void *));
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int drscmatch __P((struct device *, void *, void *));
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int drsc_dmaintr __P((struct siop_softc *));
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1996-05-19 23:03:01 +04:00
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#ifdef DEBUG
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void drsc_dump __P((void));
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#endif
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1996-05-10 00:30:30 +04:00
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struct scsi_adapter drsc_scsiswitch = {
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siop_scsicmd,
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siop_minphys,
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0, /* no lun support */
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0, /* no lun support */
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};
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struct scsi_device drsc_scsidev = {
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NULL, /* use default error handler */
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NULL, /* do not have a start functio */
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NULL, /* have no async handler */
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NULL, /* Use default done routine */
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};
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#ifdef DEBUG
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#endif
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struct cfattach drsc_ca = {
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sizeof(struct siop_softc),
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drscmatch,
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drscattach
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};
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struct cfdriver drsc_cd = {
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NULL, "drsc", DV_DULL, NULL, 0
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};
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static struct siop_softc *drsc_softc;
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/*
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* One of us is on every DraCo motherboard,
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*/
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int
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drscmatch(pdp, match, auxp)
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struct device *pdp;
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void *match, *auxp;
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{
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struct cfdata *cdp = (struct cfdata *)match;
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if (is_draco() && (cdp->cf_unit == 0))
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return(1);
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return(0);
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}
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void
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drscattach(pdp, dp, auxp)
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struct device *pdp, *dp;
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void *auxp;
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{
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struct siop_softc *sc;
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struct zbus_args *zap;
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siop_regmap_p rp;
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1996-10-11 03:51:21 +04:00
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kprintf("\n");
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1996-05-10 00:30:30 +04:00
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zap = auxp;
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sc = (struct siop_softc *)dp;
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sc->sc_siopp = rp = (siop_regmap_p)(DRCCADDR+NBPG*DRSCSIPG);
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/*
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* CTEST7 = TT1
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*/
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sc->sc_clock_freq = 50; /* Clock = 50MHz */
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sc->sc_ctest7 = 0x02;
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alloc_sicallback();
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1996-08-28 22:59:15 +04:00
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sc->sc_link.channel = SCSI_CHANNEL_ONLY_ONE;
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1996-05-10 00:30:30 +04:00
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sc->sc_link.adapter_softc = sc;
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sc->sc_link.adapter_target = 7;
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sc->sc_link.adapter = &drsc_scsiswitch;
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sc->sc_link.device = &drsc_scsidev;
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sc->sc_link.openings = 2;
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siopinitialize(sc);
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#if 0
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sc->sc_isr.isr_intr = drsc_dmaintr;
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sc->sc_isr.isr_arg = sc;
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sc->sc_isr.isr_ipl = 4;
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add_isr(&sc->sc_isr);
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#else
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drsc_softc = sc;
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*draco_intpen &= ~DRIRQ_SCSI;
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*draco_intena |= DRIRQ_SCSI;
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#endif
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/*
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* attach all scsi units on us
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*/
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1996-08-28 22:59:15 +04:00
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config_found(dp, &sc->sc_link, scsiprint);
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1996-05-10 00:30:30 +04:00
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}
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/*
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* Level 4 interrupt processing for the MacroSystem DraCo mainboard
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* SCSI. Because the level 4 interrupt is above splbio, the
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* interrupt status is saved and an sicallback to the level 2 interrupt
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* handler scheduled. This way, the actual processing of the interrupt
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* can be deferred until splbio is unblocked.
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*/
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void
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drsc_handler()
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{
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struct siop_softc *sc = drsc_softc;
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siop_regmap_p rp;
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int istat;
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if (sc->sc_flags & SIOP_INTSOFF)
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return; /* interrupts are not active */
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rp = sc->sc_siopp;
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istat = rp->siop_istat;
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if ((istat & (SIOP_ISTAT_SIP | SIOP_ISTAT_DIP)) == 0)
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return;
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/*
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* save interrupt status, DMA status, and SCSI status 0
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* (may need to deal with stacked interrupts?)
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*/
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sc->sc_sstat0 = rp->siop_sstat0;
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sc->sc_istat = istat;
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sc->sc_dstat = rp->siop_dstat;
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/*
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* disable interrupts until the callback can process this
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* interrupt.
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*/
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#ifdef DRSC_NOCALLBACK
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(void)spl1();
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siopintr(sc);
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#else
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rp->siop_sien = 0;
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rp->siop_dien = 0;
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sc->sc_flags |= SIOP_INTDEFER | SIOP_INTSOFF;
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*draco_intpen &= ~DRIRQ_SCSI;
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#ifdef DEBUG
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if (*draco_intpen & DRIRQ_SCSI)
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1996-10-11 03:51:21 +04:00
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kprintf("%s: intpen still 0x%x\n", sc->sc_dev.dv_xname,
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1996-05-10 00:30:30 +04:00
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*draco_intpen);
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#endif
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add_sicallback((sifunc_t)siopintr, sc, NULL);
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#endif
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return;
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}
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#ifdef DEBUG
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void
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drsc_dump()
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{
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int i;
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for (i = 0; i < drsc_cd.cd_ndevs; ++i)
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if (drsc_cd.cd_devs[i])
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siop_dump(drsc_cd.cd_devs[i]);
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}
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#endif
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