1998-06-21 01:01:43 +04:00
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/* $NetBSD: if_qe.c,v 1.26 1998/06/20 21:01:43 ragge Exp $ */
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1995-11-30 03:56:23 +03:00
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1995-03-31 00:26:32 +04:00
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/*
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* Copyright (c) 1988 Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Digital Equipment Corp.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)if_qe.c 7.20 (Berkeley) 3/28/91
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*/
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1997-04-19 19:02:27 +04:00
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/* from @(#)if_qe.c 1.15 (ULTRIX) 4/16/86 */
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1995-03-31 00:26:32 +04:00
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/****************************************************************
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* *
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1997-04-19 19:02:27 +04:00
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* Licensed from Digital Equipment Corporation *
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* Copyright (c) *
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* Digital Equipment Corporation *
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* Maynard, Massachusetts *
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* 1985, 1986 *
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* All rights reserved. *
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1995-03-31 00:26:32 +04:00
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* *
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1997-04-19 19:02:27 +04:00
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* The Information in this software is subject to change *
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1995-03-31 00:26:32 +04:00
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* without notice and should not be construed as a commitment *
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1997-04-19 19:02:27 +04:00
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* by Digital Equipment Corporation. Digital makes no *
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1995-03-31 00:26:32 +04:00
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* representations about the suitability of this software for *
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* any purpose. It is supplied "As Is" without expressed or *
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1997-04-19 19:02:27 +04:00
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* implied warranty. *
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1995-03-31 00:26:32 +04:00
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* *
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1997-04-19 19:02:27 +04:00
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* If the Regents of the University of California or its *
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* licensees modify the software in a manner creating *
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* derivative copyright rights, appropriate copyright *
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* legends may be placed on the derivative work in addition *
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* to that set forth above. *
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1995-03-31 00:26:32 +04:00
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* *
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****************************************************************/
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/* ---------------------------------------------------------------------
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* Modification History
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*
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* 15-Apr-86 -- afd
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* Rename "unused_multi" to "qunused_multi" for extending Generic
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* kernel to MicroVAXen.
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*
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1997-04-19 19:02:27 +04:00
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* 18-mar-86 -- jaw br/cvec changed to NOT use registers.
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1995-03-31 00:26:32 +04:00
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*
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* 12 March 86 -- Jeff Chase
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* Modified to handle the new MCLGET macro
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* Changed if_qe_data.c to use more receive buffers
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* Added a flag to poke with adb to log qe_restarts on console
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*
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* 19 Oct 85 -- rjl
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* Changed the watch dog timer from 30 seconds to 3. VMS is using
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1997-04-19 19:02:27 +04:00
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* less than 1 second in their's. Also turned the printf into an
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1995-03-31 00:26:32 +04:00
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* mprintf.
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*
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* 09/16/85 -- Larry Cohen
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1997-04-19 19:02:27 +04:00
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* Add 43bsd alpha tape changes for subnet routing
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1995-03-31 00:26:32 +04:00
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*
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* 1 Aug 85 -- rjl
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* Panic on a non-existent memory interrupt and the case where a packet
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* was chained. The first should never happen because non-existant
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* memory interrupts cause a bus reset. The second should never happen
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* because we hang 2k input buffers on the device.
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*
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* 1 Aug 85 -- rich
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1997-04-19 19:02:27 +04:00
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* Fixed the broadcast loopback code to handle Clusters without
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* wedging the system.
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1995-03-31 00:26:32 +04:00
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*
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* 27 Feb. 85 -- ejf
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* Return default hardware address on ioctl request.
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*
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* 12 Feb. 85 -- ejf
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* Added internal extended loopback capability.
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*
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* 27 Dec. 84 -- rjl
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* Fixed bug that caused every other transmit descriptor to be used
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* instead of every descriptor.
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*
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* 21 Dec. 84 -- rjl
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* Added watchdog timer to mask hardware bug that causes device lockup.
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*
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* 18 Dec. 84 -- rjl
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1997-04-19 19:02:27 +04:00
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* Reworked driver to use q-bus mapping routines. MicroVAX-I now does
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1995-03-31 00:26:32 +04:00
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* copying instead of m-buf shuffleing.
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* A number of deficencies in the hardware/firmware were compensated
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* for. See comments in qestart and qerint.
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*
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* 14 Nov. 84 -- jf
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* Added usage counts for multicast addresses.
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* Updated general protocol support to allow access to the Ethernet
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* header.
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*
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* 04 Oct. 84 -- jf
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* Added support for new ioctls to add and delete multicast addresses
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* and set the physical address.
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* Add support for general protocols.
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*
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* 14 Aug. 84 -- rjl
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* Integrated Shannon changes. (allow arp above 1024 and ? )
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*
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* 13 Feb. 84 -- rjl
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*
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* Initial version of driver. derived from IL driver.
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*
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* ---------------------------------------------------------------------
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*/
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/*
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* Digital Q-BUS to NI Adapter
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1997-05-02 21:11:24 +04:00
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* supports DEQNA and DELQA in DEQNA-mode.
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1995-03-31 00:26:32 +04:00
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*/
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1997-05-02 21:11:24 +04:00
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#include "bpfilter.h"
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1996-02-02 21:05:36 +03:00
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/buf.h>
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#include <sys/protosw.h>
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#include <sys/socket.h>
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#include <sys/ioctl.h>
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#include <sys/errno.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <sys/time.h>
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#include <sys/kernel.h>
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1998-03-13 14:40:19 +03:00
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#include <sys/reboot.h>
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1995-03-31 00:26:32 +04:00
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1996-02-02 21:05:36 +03:00
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#include <net/if.h>
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1997-03-15 21:09:08 +03:00
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#include <net/if_ether.h>
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1997-04-19 19:02:27 +04:00
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#include <net/if_dl.h>
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1995-03-31 00:26:32 +04:00
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#ifdef INET
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1996-02-02 21:05:36 +03:00
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#include <netinet/in.h>
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#include <netinet/in_systm.h>
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#include <netinet/in_var.h>
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#include <netinet/ip.h>
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1997-03-15 21:09:08 +03:00
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#include <netinet/if_inarp.h>
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1995-03-31 00:26:32 +04:00
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#endif
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#ifdef NS
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1996-02-02 21:05:36 +03:00
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#include <netns/ns.h>
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#include <netns/ns_if.h>
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1995-03-31 00:26:32 +04:00
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#endif
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#ifdef ISO
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1996-02-02 21:05:36 +03:00
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#include <netiso/iso.h>
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#include <netiso/iso_var.h>
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1995-03-31 00:26:32 +04:00
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extern char all_es_snpa[], all_is_snpa[], all_l1is_snpa[], all_l2is_snpa[];
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#endif
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1997-05-02 21:11:24 +04:00
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#if defined(CCITT) && defined(LLC)
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#include <sys/socketvar.h>
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#include <netccitt/x25.h>
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#include <netccitt/pk.h>
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#include <netccitt/pk_var.h>
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#include <netccitt/pk_extern.h>
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#endif
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#if NBPFILTER > 0
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#include <net/bpf.h>
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#include <net/bpfdesc.h>
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#endif
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1996-02-02 21:05:36 +03:00
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#include <machine/pte.h>
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#include <machine/cpu.h>
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1998-03-13 14:40:19 +03:00
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#include <machine/rpb.h>
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1996-02-02 21:59:16 +03:00
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#include <vax/if/if_qereg.h>
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#include <vax/if/if_uba.h>
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1996-02-02 21:05:36 +03:00
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#include <vax/uba/ubareg.h>
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#include <vax/uba/ubavar.h>
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1995-03-31 00:26:32 +04:00
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1997-04-19 19:02:27 +04:00
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#define NRCV 15 /* Receive descriptors */
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#define NXMT 5 /* Transmit descriptors */
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1995-03-31 00:26:32 +04:00
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#define NTOT (NXMT + NRCV)
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1997-04-19 19:02:27 +04:00
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#define QETIMEOUT 2 /* transmit timeout, must be > 1 */
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1995-03-31 00:26:32 +04:00
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#define QESLOWTIMEOUT 40 /* timeout when no xmits in progress */
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#define MINDATA 60
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/*
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* Ethernet software status per interface.
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*
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* Each interface is referenced by a network interface structure,
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* qe_if, which the routing code uses to locate the interface.
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* This structure contains the output queue for the interface, its address, ...
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*/
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struct qe_softc {
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1996-03-18 19:47:24 +03:00
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struct device qe_dev; /* Configuration common part */
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1997-04-19 19:02:27 +04:00
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struct ethercom qe_ec; /* Ethernet common part */
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#define qe_if qe_ec.ec_if /* network-visible interface */
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struct ifubinfo qe_uba; /* Q-bus resources */
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1997-05-02 21:11:24 +04:00
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struct ifrw qe_ifr[NRCV]; /* for receive buffers; */
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struct ifxmt qe_ifw[NXMT]; /* for xmit buffers; */
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1995-12-01 22:37:55 +03:00
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struct qedevice *qe_vaddr;
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1995-03-31 00:26:32 +04:00
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int qe_flags; /* software state */
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1997-04-19 19:02:27 +04:00
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#define QEF_RUNNING 0x01
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#define QEF_SETADDR 0x02
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1995-03-31 00:26:32 +04:00
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#define QEF_FASTTIMEO 0x04
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1997-04-19 19:02:27 +04:00
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int setupaddr; /* mapping info for setup pkts */
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1995-03-31 00:26:32 +04:00
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int ipl; /* interrupt priority */
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struct qe_ring *rringaddr; /* mapping info for rings */
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1997-04-19 19:02:27 +04:00
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struct qe_ring *tringaddr; /* "" */
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1997-05-02 21:11:24 +04:00
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struct qe_ring rring[NRCV+1]; /* Receive ring descriptors */
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struct qe_ring tring[NXMT+1]; /* Xmit ring descriptors */
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1995-03-31 00:26:32 +04:00
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u_char setup_pkt[16][8]; /* Setup packet */
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int rindex; /* Receive index */
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int tindex; /* Transmit index */
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int otindex; /* Old transmit index */
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1997-04-19 19:02:27 +04:00
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int qe_intvec; /* Interrupt vector */
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1997-05-02 21:11:24 +04:00
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struct qedevice *addr; /* device addr */
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1997-04-19 19:02:27 +04:00
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int setupqueued; /* setup packet queued */
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1997-05-02 21:11:24 +04:00
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int setuplength; /* length of setup packet */
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1995-03-31 00:26:32 +04:00
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int nxmit; /* Transmits in progress */
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int qe_restarts; /* timeouts */
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1995-12-01 22:37:55 +03:00
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};
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1998-01-24 17:16:11 +03:00
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int qematch __P((struct device *, struct cfdata *, void *));
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1995-12-01 22:37:55 +03:00
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void qeattach __P((struct device *, struct device *, void *));
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1996-03-18 19:47:24 +03:00
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void qereset __P((int));
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1996-05-07 05:35:48 +04:00
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void qeinit __P((struct qe_softc *));
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1995-12-01 22:37:55 +03:00
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void qestart __P((struct ifnet *));
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void qeintr __P((int));
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void qetint __P((int));
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void qerint __P((int));
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int qeioctl __P((struct ifnet *, u_long, caddr_t));
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1996-05-07 05:35:48 +04:00
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void qe_setaddr __P((u_char *, struct qe_softc *));
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1995-12-01 22:37:55 +03:00
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void qeinitdesc __P((struct qe_ring *, caddr_t, int));
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void qesetup __P((struct qe_softc *));
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void qeread __P((struct qe_softc *, struct ifrw *, int));
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1996-05-07 05:35:48 +04:00
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void qetimeout __P((struct ifnet *));
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1995-12-01 22:37:55 +03:00
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void qerestart __P((struct qe_softc *));
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1996-03-18 01:56:15 +03:00
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struct cfattach qe_ca = {
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sizeof(struct qe_softc), qematch, qeattach
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};
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1995-03-31 00:26:32 +04:00
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1998-01-12 23:52:29 +03:00
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extern struct cfdriver qe_cd;
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1997-04-19 19:02:27 +04:00
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#define QEUNIT(x) minor(x)
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1995-03-31 00:26:32 +04:00
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/*
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* The deqna shouldn't receive more than ETHERMTU + sizeof(struct ether_header)
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* but will actually take in up to 2048 bytes. To guard against the receiver
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* chaining buffers (which we aren't prepared to handle) we allocate 2kb
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* size buffers.
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*/
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#define MAXPACKETSIZE 2048 /* Should really be ETHERMTU */
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1995-12-01 22:37:55 +03:00
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1995-03-31 00:26:32 +04:00
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/*
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* Probe the QNA to see if it's there
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*/
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1995-12-01 22:37:55 +03:00
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int
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1998-01-24 17:16:11 +03:00
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qematch(parent, cf, aux)
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1995-12-01 22:37:55 +03:00
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struct device *parent;
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1998-01-24 17:16:11 +03:00
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struct cfdata *cf;
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void *aux;
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1995-03-31 00:26:32 +04:00
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{
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1998-01-24 17:16:11 +03:00
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struct qe_softc sc;
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1995-12-01 22:37:55 +03:00
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struct uba_attach_args *ua = aux;
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struct uba_softc *ubasc = (struct uba_softc *)parent;
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1997-04-19 19:02:27 +04:00
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struct qe_ring *rp;
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struct qe_ring *prp; /* physical rp */
|
1995-12-01 22:37:55 +03:00
|
|
|
volatile struct qedevice *addr = (struct qedevice *)ua->ua_addr;
|
1995-11-10 22:25:46 +03:00
|
|
|
int i;
|
1995-03-31 00:26:32 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* The QNA interrupts on i/o operations. To do an I/O operation
|
|
|
|
* we have to setup the interface by transmitting a setup packet.
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
|
1995-03-31 00:26:32 +04:00
|
|
|
addr->qe_csr = QE_RESET;
|
|
|
|
addr->qe_csr &= ~QE_RESET;
|
1995-11-10 22:25:46 +03:00
|
|
|
addr->qe_vector = (ubasc->uh_lastiv -= 4);
|
1995-03-31 00:26:32 +04:00
|
|
|
|
1998-01-24 17:16:11 +03:00
|
|
|
bzero(&sc, sizeof(struct qe_softc));
|
1995-03-31 00:26:32 +04:00
|
|
|
/*
|
|
|
|
* Map the communications area and the setup packet.
|
|
|
|
*/
|
1998-01-24 17:16:11 +03:00
|
|
|
sc.setupaddr =
|
|
|
|
uballoc(ubasc, (caddr_t)sc.setup_pkt, sizeof(sc.setup_pkt), 0);
|
|
|
|
sc.rringaddr = (struct qe_ring *) uballoc(ubasc, (caddr_t)sc.rring,
|
1995-12-01 22:37:55 +03:00
|
|
|
sizeof(struct qe_ring) * (NTOT+2), 0);
|
1998-01-24 17:16:11 +03:00
|
|
|
prp = (struct qe_ring *)UBAI_ADDR((int)sc.rringaddr);
|
1995-03-31 00:26:32 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* The QNA will loop the setup packet back to the receive ring
|
|
|
|
* for verification, therefore we initialize the first
|
|
|
|
* receive & transmit ring descriptors and link the setup packet
|
|
|
|
* to them.
|
|
|
|
*/
|
1998-01-24 17:16:11 +03:00
|
|
|
qeinitdesc(sc.tring, (caddr_t)UBAI_ADDR(sc.setupaddr),
|
|
|
|
sizeof(sc.setup_pkt));
|
|
|
|
qeinitdesc(sc.rring, (caddr_t)UBAI_ADDR(sc.setupaddr),
|
|
|
|
sizeof(sc.setup_pkt));
|
1995-03-31 00:26:32 +04:00
|
|
|
|
1998-01-24 17:16:11 +03:00
|
|
|
rp = (struct qe_ring *)sc.tring;
|
1995-03-31 00:26:32 +04:00
|
|
|
rp->qe_setup = 1;
|
|
|
|
rp->qe_eomsg = 1;
|
|
|
|
rp->qe_flag = rp->qe_status1 = QE_NOTYET;
|
|
|
|
rp->qe_valid = 1;
|
|
|
|
|
1998-01-24 17:16:11 +03:00
|
|
|
rp = (struct qe_ring *)sc.rring;
|
1995-03-31 00:26:32 +04:00
|
|
|
rp->qe_flag = rp->qe_status1 = QE_NOTYET;
|
|
|
|
rp->qe_valid = 1;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Get the addr off of the interface and place it into the setup
|
|
|
|
* packet. This code looks strange due to the fact that the address
|
|
|
|
* is placed in the setup packet in col. major order.
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
for (i = 0; i < 6; i++)
|
1998-01-24 17:16:11 +03:00
|
|
|
sc.setup_pkt[i][1] = addr->qe_sta_addr[i];
|
1995-03-31 00:26:32 +04:00
|
|
|
|
1998-01-24 17:16:11 +03:00
|
|
|
qesetup(&sc);
|
1995-03-31 00:26:32 +04:00
|
|
|
/*
|
|
|
|
* Start the interface and wait for the packet.
|
|
|
|
*/
|
|
|
|
addr->qe_csr = QE_INT_ENABLE | QE_XMIT_INT | QE_RCV_INT;
|
|
|
|
addr->qe_rcvlist_lo = (short)((int)prp);
|
|
|
|
addr->qe_rcvlist_hi = (short)((int)prp >> 16);
|
|
|
|
prp += NRCV+1;
|
|
|
|
addr->qe_xmtlist_lo = (short)((int)prp);
|
|
|
|
addr->qe_xmtlist_hi = (short)((int)prp >> 16);
|
|
|
|
DELAY(10000);
|
|
|
|
/*
|
|
|
|
* All done with the bus resources.
|
|
|
|
*/
|
1998-01-24 17:16:11 +03:00
|
|
|
ubarelse(ubasc, &sc.setupaddr);
|
|
|
|
ubarelse(ubasc, (int *)&sc.rringaddr);
|
1995-12-01 22:37:55 +03:00
|
|
|
ua->ua_ivec = qeintr;
|
|
|
|
return 1;
|
1995-03-31 00:26:32 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Interface exists: make available by filling in network interface
|
|
|
|
* record. System will initialize the interface when it is ready
|
|
|
|
* to accept packets.
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
void
|
|
|
|
qeattach(parent, self, aux)
|
|
|
|
struct device *parent, *self;
|
|
|
|
void *aux;
|
1995-03-31 00:26:32 +04:00
|
|
|
{
|
1995-12-01 22:37:55 +03:00
|
|
|
struct uba_attach_args *ua = aux;
|
|
|
|
struct qe_softc *sc = (struct qe_softc *)self;
|
|
|
|
struct ifnet *ifp = (struct ifnet *)&sc->qe_if;
|
|
|
|
struct qedevice *addr =(struct qedevice *)ua->ua_addr;
|
1995-07-05 12:19:05 +04:00
|
|
|
int i;
|
1997-03-15 21:09:08 +03:00
|
|
|
u_int8_t myaddr[ETHER_ADDR_LEN];
|
1995-03-31 00:26:32 +04:00
|
|
|
|
1996-10-13 07:29:05 +04:00
|
|
|
printf("\n");
|
1998-01-24 17:16:11 +03:00
|
|
|
sc->ipl = 0x15;
|
1995-12-01 22:37:55 +03:00
|
|
|
sc->qe_vaddr = addr;
|
1996-05-19 20:43:02 +04:00
|
|
|
bcopy(sc->qe_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
|
1996-05-07 05:35:48 +04:00
|
|
|
ifp->if_softc = sc;
|
1995-03-31 00:26:32 +04:00
|
|
|
/*
|
|
|
|
* The Deqna is cable of transmitting broadcasts, but
|
|
|
|
* doesn't listen to its own.
|
|
|
|
*/
|
1997-05-02 21:11:24 +04:00
|
|
|
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS |
|
|
|
|
IFF_MULTICAST;
|
1995-03-31 00:26:32 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Read the address from the prom and save it.
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
for (i = 0; i < 6; i++)
|
1997-03-15 21:09:08 +03:00
|
|
|
sc->setup_pkt[i][1] = myaddr[i] =
|
1995-12-01 22:37:55 +03:00
|
|
|
addr->qe_sta_addr[i] & 0xff;
|
1995-03-31 00:26:32 +04:00
|
|
|
addr->qe_vector |= 1;
|
1996-10-13 07:29:05 +04:00
|
|
|
printf("qe%d: %s, hardware address %s\n", sc->qe_dev.dv_unit,
|
1995-03-31 00:26:32 +04:00
|
|
|
addr->qe_vector&01 ? "delqa":"deqna",
|
1997-03-15 21:09:08 +03:00
|
|
|
ether_sprintf(myaddr));
|
1995-03-31 00:26:32 +04:00
|
|
|
addr->qe_vector &= ~1;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Save the vector for initialization at reset time.
|
|
|
|
*/
|
|
|
|
sc->qe_intvec = addr->qe_vector;
|
|
|
|
|
|
|
|
ifp->if_start = qestart;
|
|
|
|
ifp->if_ioctl = qeioctl;
|
|
|
|
ifp->if_watchdog = qetimeout;
|
|
|
|
sc->qe_uba.iff_flags = UBA_CANTWAIT;
|
|
|
|
if_attach(ifp);
|
1997-03-15 21:09:08 +03:00
|
|
|
ether_ifattach(ifp, myaddr);
|
1997-05-02 21:11:24 +04:00
|
|
|
|
|
|
|
#if NBPFILTER > 0
|
|
|
|
bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
|
|
|
|
#endif
|
1998-03-13 14:40:19 +03:00
|
|
|
if (B_TYPE(bootdev) == BDEV_QE)
|
|
|
|
booted_from = self;
|
1995-03-31 00:26:32 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Reset of interface after UNIBUS reset.
|
|
|
|
*/
|
1996-03-18 19:47:24 +03:00
|
|
|
void
|
1995-12-01 22:37:55 +03:00
|
|
|
qereset(unit)
|
|
|
|
int unit;
|
1995-03-31 00:26:32 +04:00
|
|
|
{
|
1996-03-18 19:47:24 +03:00
|
|
|
struct qe_softc *sc = qe_cd.cd_devs[unit];
|
1995-03-31 00:26:32 +04:00
|
|
|
|
1996-10-13 07:29:05 +04:00
|
|
|
printf(" %s", sc->qe_dev.dv_xname);
|
1996-03-18 19:47:24 +03:00
|
|
|
sc->qe_if.if_flags &= ~IFF_RUNNING;
|
1996-05-07 05:35:48 +04:00
|
|
|
qeinit(sc);
|
1995-03-31 00:26:32 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialization of interface.
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
void
|
1996-05-07 05:35:48 +04:00
|
|
|
qeinit(sc)
|
|
|
|
struct qe_softc *sc;
|
1995-03-31 00:26:32 +04:00
|
|
|
{
|
1995-12-01 22:37:55 +03:00
|
|
|
struct qedevice *addr = sc->qe_vaddr;
|
1996-08-20 18:07:33 +04:00
|
|
|
struct uba_softc *ubasc = (void *)sc->qe_dev.dv_parent;
|
1995-07-05 12:19:05 +04:00
|
|
|
struct ifnet *ifp = (struct ifnet *)&sc->qe_if;
|
|
|
|
int i;
|
1995-03-31 00:26:32 +04:00
|
|
|
int s;
|
|
|
|
|
|
|
|
/* address not known */
|
1995-07-05 12:19:05 +04:00
|
|
|
if (ifp->if_addrlist.tqh_first == (struct ifaddr *)0)
|
1995-03-31 00:26:32 +04:00
|
|
|
return;
|
|
|
|
if (sc->qe_flags & QEF_RUNNING)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if ((ifp->if_flags & IFF_RUNNING) == 0) {
|
|
|
|
/*
|
|
|
|
* map the communications area onto the device
|
|
|
|
*/
|
1996-08-20 18:07:33 +04:00
|
|
|
i = uballoc(ubasc, (caddr_t)sc->rring,
|
1995-03-31 00:26:32 +04:00
|
|
|
sizeof(struct qe_ring) * (NTOT+2), 0);
|
|
|
|
if (i == 0)
|
|
|
|
goto fail;
|
|
|
|
sc->rringaddr = (struct qe_ring *)UBAI_ADDR(i);
|
|
|
|
sc->tringaddr = sc->rringaddr + NRCV + 1;
|
1996-08-20 18:07:33 +04:00
|
|
|
i = uballoc(ubasc, (caddr_t)sc->setup_pkt,
|
1995-03-31 00:26:32 +04:00
|
|
|
sizeof(sc->setup_pkt), 0);
|
|
|
|
if (i == 0)
|
|
|
|
goto fail;
|
1997-04-19 19:02:27 +04:00
|
|
|
sc->setupaddr = UBAI_ADDR(i);
|
1995-03-31 00:26:32 +04:00
|
|
|
/*
|
|
|
|
* init buffers and maps
|
|
|
|
*/
|
1996-08-20 18:07:33 +04:00
|
|
|
if (if_ubaminit(&sc->qe_uba, (void *)sc->qe_dev.dv_parent,
|
1995-03-31 00:26:32 +04:00
|
|
|
sizeof (struct ether_header), (int)btoc(MAXPACKETSIZE),
|
|
|
|
sc->qe_ifr, NRCV, sc->qe_ifw, NXMT) == 0) {
|
|
|
|
fail:
|
1996-10-13 07:29:05 +04:00
|
|
|
printf("%s: can't allocate uba resources\n",
|
1996-05-19 20:43:02 +04:00
|
|
|
sc->qe_dev.dv_xname);
|
1995-03-31 00:26:32 +04:00
|
|
|
sc->qe_if.if_flags &= ~IFF_UP;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* Init the buffer descriptors and indexes for each of the lists and
|
|
|
|
* loop them back to form a ring.
|
|
|
|
*/
|
|
|
|
for (i = 0; i < NRCV; i++) {
|
|
|
|
qeinitdesc( &sc->rring[i],
|
|
|
|
(caddr_t)UBAI_ADDR(sc->qe_ifr[i].ifrw_info), MAXPACKETSIZE);
|
|
|
|
sc->rring[i].qe_flag = sc->rring[i].qe_status1 = QE_NOTYET;
|
|
|
|
sc->rring[i].qe_valid = 1;
|
|
|
|
}
|
|
|
|
qeinitdesc(&sc->rring[i], (caddr_t)NULL, 0);
|
|
|
|
|
|
|
|
sc->rring[i].qe_addr_lo = (short)((int)sc->rringaddr);
|
|
|
|
sc->rring[i].qe_addr_hi = (short)((int)sc->rringaddr >> 16);
|
|
|
|
sc->rring[i].qe_chain = 1;
|
|
|
|
sc->rring[i].qe_flag = sc->rring[i].qe_status1 = QE_NOTYET;
|
|
|
|
sc->rring[i].qe_valid = 1;
|
|
|
|
|
|
|
|
for( i = 0 ; i <= NXMT ; i++ )
|
|
|
|
qeinitdesc(&sc->tring[i], (caddr_t)NULL, 0);
|
|
|
|
i--;
|
|
|
|
|
|
|
|
sc->tring[i].qe_addr_lo = (short)((int)sc->tringaddr);
|
|
|
|
sc->tring[i].qe_addr_hi = (short)((int)sc->tringaddr >> 16);
|
|
|
|
sc->tring[i].qe_chain = 1;
|
|
|
|
sc->tring[i].qe_flag = sc->tring[i].qe_status1 = QE_NOTYET;
|
|
|
|
sc->tring[i].qe_valid = 1;
|
|
|
|
|
|
|
|
sc->nxmit = sc->otindex = sc->tindex = sc->rindex = 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Take the interface out of reset, program the vector,
|
|
|
|
* enable interrupts, and tell the world we are up.
|
|
|
|
*/
|
1995-12-24 05:29:35 +03:00
|
|
|
s = splnet();
|
1995-03-31 00:26:32 +04:00
|
|
|
addr->qe_vector = sc->qe_intvec;
|
|
|
|
sc->addr = addr;
|
|
|
|
addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT |
|
|
|
|
QE_RCV_INT | QE_ILOOP;
|
|
|
|
addr->qe_rcvlist_lo = (short)((int)sc->rringaddr);
|
|
|
|
addr->qe_rcvlist_hi = (short)((int)sc->rringaddr >> 16);
|
|
|
|
ifp->if_flags |= IFF_UP | IFF_RUNNING;
|
|
|
|
sc->qe_flags |= QEF_RUNNING;
|
|
|
|
qesetup( sc );
|
1995-04-11 10:16:33 +04:00
|
|
|
qestart( ifp );
|
1995-03-31 00:26:32 +04:00
|
|
|
sc->qe_if.if_timer = QESLOWTIMEOUT; /* Start watchdog */
|
|
|
|
splx( s );
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Start output on interface.
|
|
|
|
*
|
|
|
|
*/
|
1995-04-11 10:16:33 +04:00
|
|
|
void
|
1995-03-31 00:26:32 +04:00
|
|
|
qestart(ifp)
|
|
|
|
struct ifnet *ifp;
|
|
|
|
{
|
1996-05-07 05:35:48 +04:00
|
|
|
register struct qe_softc *sc = ifp->if_softc;
|
1995-12-01 22:37:55 +03:00
|
|
|
volatile struct qedevice *addr = sc->qe_vaddr;
|
|
|
|
register struct qe_ring *rp;
|
1995-03-31 00:26:32 +04:00
|
|
|
register index;
|
|
|
|
struct mbuf *m;
|
|
|
|
int buf_addr, len, s;
|
|
|
|
|
|
|
|
|
1995-12-24 05:29:35 +03:00
|
|
|
s = splnet();
|
1995-03-31 00:26:32 +04:00
|
|
|
/*
|
|
|
|
* The deqna doesn't look at anything but the valid bit
|
|
|
|
* to determine if it should transmit this packet. If you have
|
|
|
|
* a ring and fill it the device will loop indefinately on the
|
|
|
|
* packet and continue to flood the net with packets until you
|
|
|
|
* break the ring. For this reason we never queue more than n-1
|
|
|
|
* packets in the transmit ring.
|
|
|
|
*
|
|
|
|
* The microcoders should have obeyed their own defination of the
|
|
|
|
* flag and status words, but instead we have to compensate.
|
|
|
|
*/
|
|
|
|
for( index = sc->tindex;
|
|
|
|
sc->tring[index].qe_valid == 0 && sc->nxmit < (NXMT-1) ;
|
|
|
|
sc->tindex = index = ++index % NXMT){
|
|
|
|
rp = &sc->tring[index];
|
|
|
|
if( sc->setupqueued ) {
|
|
|
|
buf_addr = sc->setupaddr;
|
1997-05-02 21:11:24 +04:00
|
|
|
len = sc->setuplength;
|
1995-03-31 00:26:32 +04:00
|
|
|
rp->qe_setup = 1;
|
|
|
|
sc->setupqueued = 0;
|
|
|
|
} else {
|
|
|
|
IF_DEQUEUE(&sc->qe_if.if_snd, m);
|
1995-12-01 22:37:55 +03:00
|
|
|
if (m == 0) {
|
1995-03-31 00:26:32 +04:00
|
|
|
splx(s);
|
1995-07-05 12:19:05 +04:00
|
|
|
return;
|
1995-03-31 00:26:32 +04:00
|
|
|
}
|
1997-05-02 21:11:24 +04:00
|
|
|
#if NBPFILTER > 0
|
|
|
|
if (ifp->if_bpf)
|
|
|
|
bpf_mtap(ifp->if_bpf, m);
|
|
|
|
#endif
|
1995-03-31 00:26:32 +04:00
|
|
|
buf_addr = sc->qe_ifw[index].ifw_info;
|
|
|
|
len = if_ubaput(&sc->qe_uba, &sc->qe_ifw[index], m);
|
|
|
|
}
|
|
|
|
if( len < MINDATA )
|
|
|
|
len = MINDATA;
|
|
|
|
/*
|
|
|
|
* Does buffer end on odd byte ?
|
|
|
|
*/
|
|
|
|
if( len & 1 ) {
|
|
|
|
len++;
|
|
|
|
rp->qe_odd_end = 1;
|
|
|
|
}
|
|
|
|
rp->qe_buf_len = -(len/2);
|
|
|
|
buf_addr = UBAI_ADDR(buf_addr);
|
|
|
|
rp->qe_flag = rp->qe_status1 = QE_NOTYET;
|
|
|
|
rp->qe_addr_lo = (short)buf_addr;
|
|
|
|
rp->qe_addr_hi = (short)(buf_addr >> 16);
|
|
|
|
rp->qe_eomsg = 1;
|
|
|
|
rp->qe_flag = rp->qe_status1 = QE_NOTYET;
|
|
|
|
rp->qe_valid = 1;
|
|
|
|
if (sc->nxmit++ == 0) {
|
|
|
|
sc->qe_flags |= QEF_FASTTIMEO;
|
|
|
|
sc->qe_if.if_timer = QETIMEOUT;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* See if the xmit list is invalid.
|
|
|
|
*/
|
|
|
|
if( addr->qe_csr & QE_XL_INVALID ) {
|
|
|
|
buf_addr = (int)(sc->tringaddr+index);
|
|
|
|
addr->qe_xmtlist_lo = (short)buf_addr;
|
|
|
|
addr->qe_xmtlist_hi = (short)(buf_addr >> 16);
|
|
|
|
}
|
|
|
|
}
|
1995-07-05 12:19:05 +04:00
|
|
|
splx(s);
|
|
|
|
return;
|
1995-03-31 00:26:32 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Ethernet interface interrupt processor
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
void
|
1995-11-10 22:25:46 +03:00
|
|
|
qeintr(unit)
|
1995-12-01 22:37:55 +03:00
|
|
|
int unit;
|
1995-03-31 00:26:32 +04:00
|
|
|
{
|
1995-12-01 22:37:55 +03:00
|
|
|
register struct qe_softc *sc;
|
|
|
|
volatile struct qedevice *addr;
|
1995-03-31 00:26:32 +04:00
|
|
|
int buf_addr, csr;
|
|
|
|
|
1996-03-18 01:56:15 +03:00
|
|
|
sc = qe_cd.cd_devs[unit];
|
1995-12-01 22:37:55 +03:00
|
|
|
addr = sc->qe_vaddr;
|
1995-03-31 00:26:32 +04:00
|
|
|
splx(sc->ipl);
|
|
|
|
if (!(sc->qe_flags & QEF_FASTTIMEO))
|
|
|
|
sc->qe_if.if_timer = QESLOWTIMEOUT; /* Restart timer clock */
|
|
|
|
csr = addr->qe_csr;
|
1995-12-01 22:37:55 +03:00
|
|
|
addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE |
|
|
|
|
QE_XMIT_INT | QE_RCV_INT | QE_ILOOP;
|
|
|
|
if (csr & QE_RCV_INT)
|
|
|
|
qerint(unit);
|
|
|
|
if (csr & QE_XMIT_INT)
|
|
|
|
qetint(unit );
|
|
|
|
if (csr & QE_NEX_MEM_INT)
|
1996-10-13 07:29:05 +04:00
|
|
|
printf("qe%d: Nonexistent memory interrupt\n", unit);
|
1995-03-31 00:26:32 +04:00
|
|
|
|
1995-12-01 22:37:55 +03:00
|
|
|
if (addr->qe_csr & QE_RL_INVALID && sc->rring[sc->rindex].qe_status1 ==
|
|
|
|
QE_NOTYET) {
|
1995-03-31 00:26:32 +04:00
|
|
|
buf_addr = (int)&sc->rringaddr[sc->rindex];
|
|
|
|
addr->qe_rcvlist_lo = (short)buf_addr;
|
|
|
|
addr->qe_rcvlist_hi = (short)(buf_addr >> 16);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Ethernet interface transmit interrupt.
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
void
|
1995-03-31 00:26:32 +04:00
|
|
|
qetint(unit)
|
|
|
|
int unit;
|
|
|
|
{
|
1996-03-18 01:56:15 +03:00
|
|
|
register struct qe_softc *sc = qe_cd.cd_devs[unit];
|
1995-12-01 22:37:55 +03:00
|
|
|
register struct qe_ring *rp;
|
|
|
|
register struct ifxmt *ifxp;
|
1995-03-31 00:26:32 +04:00
|
|
|
int status1, setupflag;
|
|
|
|
short len;
|
|
|
|
|
|
|
|
|
1995-12-01 22:37:55 +03:00
|
|
|
while (sc->otindex != sc->tindex && sc->tring[sc->otindex].qe_status1
|
|
|
|
!= QE_NOTYET && sc->nxmit > 0) {
|
1995-03-31 00:26:32 +04:00
|
|
|
/*
|
|
|
|
* Save the status words from the descriptor so that it can
|
|
|
|
* be released.
|
|
|
|
*/
|
|
|
|
rp = &sc->tring[sc->otindex];
|
|
|
|
status1 = rp->qe_status1;
|
|
|
|
setupflag = rp->qe_setup;
|
|
|
|
len = (-rp->qe_buf_len) * 2;
|
|
|
|
if( rp->qe_odd_end )
|
|
|
|
len++;
|
|
|
|
/*
|
|
|
|
* Init the buffer descriptor
|
|
|
|
*/
|
|
|
|
bzero((caddr_t)rp, sizeof(struct qe_ring));
|
|
|
|
if( --sc->nxmit == 0 ) {
|
|
|
|
sc->qe_flags &= ~QEF_FASTTIMEO;
|
|
|
|
sc->qe_if.if_timer = QESLOWTIMEOUT;
|
|
|
|
}
|
|
|
|
if( !setupflag ) {
|
|
|
|
/*
|
|
|
|
* Do some statistics.
|
|
|
|
*/
|
|
|
|
sc->qe_if.if_opackets++;
|
|
|
|
sc->qe_if.if_collisions += ( status1 & QE_CCNT ) >> 4;
|
|
|
|
if (status1 & QE_ERROR)
|
|
|
|
sc->qe_if.if_oerrors++;
|
|
|
|
ifxp = &sc->qe_ifw[sc->otindex];
|
|
|
|
if (ifxp->ifw_xtofree) {
|
|
|
|
m_freem(ifxp->ifw_xtofree);
|
|
|
|
ifxp->ifw_xtofree = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
sc->otindex = ++sc->otindex % NXMT;
|
|
|
|
}
|
1995-12-01 22:37:55 +03:00
|
|
|
qestart(&sc->qe_if);
|
1995-03-31 00:26:32 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Ethernet interface receiver interrupt.
|
|
|
|
* If can't determine length from type, then have to drop packet.
|
|
|
|
* Othewise decapsulate packet based on type and pass to type specific
|
|
|
|
* higher-level input routine.
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
void
|
1995-03-31 00:26:32 +04:00
|
|
|
qerint(unit)
|
|
|
|
int unit;
|
|
|
|
{
|
1996-03-18 01:56:15 +03:00
|
|
|
register struct qe_softc *sc = qe_cd.cd_devs[unit];
|
1995-12-01 22:37:55 +03:00
|
|
|
register struct qe_ring *rp;
|
1995-03-31 00:26:32 +04:00
|
|
|
register int nrcv = 0;
|
|
|
|
int len, status1, status2;
|
|
|
|
int bufaddr;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Traverse the receive ring looking for packets to pass back.
|
|
|
|
* The search is complete when we find a descriptor not in use.
|
|
|
|
*
|
|
|
|
* As in the transmit case the deqna doesn't honor it's own protocols
|
|
|
|
* so there exists the possibility that the device can beat us around
|
|
|
|
* the ring. The proper way to guard against this is to insure that
|
|
|
|
* there is always at least one invalid descriptor. We chose instead
|
|
|
|
* to make the ring large enough to minimize the problem. With a ring
|
|
|
|
* size of 4 we haven't been able to see the problem. To be safe we
|
|
|
|
* doubled that to 8.
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
while (sc->rring[sc->rindex].qe_status1 == QE_NOTYET && nrcv < NRCV) {
|
|
|
|
/*
|
|
|
|
* We got an interrupt but did not find an input packet
|
|
|
|
* where we expected one to be, probably because the ring
|
|
|
|
* was overrun.
|
|
|
|
* We search forward to find a valid packet and start
|
|
|
|
* processing from there. If no valid packet is found it
|
|
|
|
* means we processed all the packets during a previous
|
|
|
|
* interrupt and that the QE_RCV_INT bit was set while
|
|
|
|
* we were processing one of these earlier packets. In
|
|
|
|
* this case we can safely ignore the interrupt (by dropping
|
|
|
|
* through the code below).
|
|
|
|
*/
|
|
|
|
sc->rindex = (sc->rindex + 1) % NRCV;
|
|
|
|
nrcv++;
|
|
|
|
}
|
1998-06-21 01:01:43 +04:00
|
|
|
#ifndef QE_NO_OVERRUN_WARNINGS
|
1995-03-31 00:26:32 +04:00
|
|
|
if (nrcv && nrcv < NRCV)
|
|
|
|
log(LOG_ERR, "qe%d: ring overrun, resync'd by skipping %d\n",
|
|
|
|
unit, nrcv);
|
1998-06-21 01:01:43 +04:00
|
|
|
#endif
|
1995-03-31 00:26:32 +04:00
|
|
|
|
1995-12-01 22:37:55 +03:00
|
|
|
for (; sc->rring[sc->rindex].qe_status1 != QE_NOTYET;
|
|
|
|
sc->rindex = ++sc->rindex % NRCV) {
|
1995-03-31 00:26:32 +04:00
|
|
|
rp = &sc->rring[sc->rindex];
|
|
|
|
status1 = rp->qe_status1;
|
|
|
|
status2 = rp->qe_status2;
|
|
|
|
bzero((caddr_t)rp, sizeof(struct qe_ring));
|
|
|
|
if( (status1 & QE_MASK) == QE_MASK )
|
|
|
|
panic("qe: chained packet");
|
|
|
|
len = ((status1 & QE_RBL_HI) | (status2 & QE_RBL_LO)) + 60;
|
|
|
|
sc->qe_if.if_ipackets++;
|
|
|
|
|
|
|
|
if (status1 & QE_ERROR) {
|
|
|
|
if ((status1 & QE_RUNT) == 0)
|
|
|
|
sc->qe_if.if_ierrors++;
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* We don't process setup packets.
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
if (!(status1 & QE_ESETUP))
|
1995-03-31 00:26:32 +04:00
|
|
|
qeread(sc, &sc->qe_ifr[sc->rindex],
|
|
|
|
len - sizeof(struct ether_header));
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* Return the buffer to the ring
|
|
|
|
*/
|
|
|
|
bufaddr = (int)UBAI_ADDR(sc->qe_ifr[sc->rindex].ifrw_info);
|
|
|
|
rp->qe_buf_len = -((MAXPACKETSIZE)/2);
|
|
|
|
rp->qe_addr_lo = (short)bufaddr;
|
|
|
|
rp->qe_addr_hi = (short)((int)bufaddr >> 16);
|
|
|
|
rp->qe_flag = rp->qe_status1 = QE_NOTYET;
|
|
|
|
rp->qe_valid = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Process an ioctl request.
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
int
|
1995-03-31 00:26:32 +04:00
|
|
|
qeioctl(ifp, cmd, data)
|
|
|
|
register struct ifnet *ifp;
|
1995-12-01 22:37:55 +03:00
|
|
|
u_long cmd;
|
1995-03-31 00:26:32 +04:00
|
|
|
caddr_t data;
|
|
|
|
{
|
1996-05-07 05:35:48 +04:00
|
|
|
struct qe_softc *sc = ifp->if_softc;
|
1995-03-31 00:26:32 +04:00
|
|
|
struct ifaddr *ifa = (struct ifaddr *)data;
|
1997-05-02 21:11:24 +04:00
|
|
|
struct ifreq *ifr = (struct ifreq *)data;
|
1995-12-24 05:29:35 +03:00
|
|
|
int s = splnet(), error = 0;
|
1995-03-31 00:26:32 +04:00
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
|
|
|
|
case SIOCSIFADDR:
|
|
|
|
ifp->if_flags |= IFF_UP;
|
1996-05-07 05:35:48 +04:00
|
|
|
qeinit(sc);
|
1995-03-31 00:26:32 +04:00
|
|
|
switch(ifa->ifa_addr->sa_family) {
|
|
|
|
#ifdef INET
|
|
|
|
case AF_INET:
|
1997-03-15 21:09:08 +03:00
|
|
|
arp_ifinit(ifp, ifa);
|
1995-03-31 00:26:32 +04:00
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
#ifdef NS
|
|
|
|
case AF_NS:
|
|
|
|
{
|
|
|
|
register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr);
|
|
|
|
|
|
|
|
if (ns_nullhost(*ina))
|
1997-03-15 21:09:08 +03:00
|
|
|
ina->x_host =
|
|
|
|
*(union ns_host *)LLADDR(ifp->if_sadl);
|
1995-03-31 00:26:32 +04:00
|
|
|
else
|
1996-05-07 05:35:48 +04:00
|
|
|
qe_setaddr(ina->x_host.c_host, sc);
|
1995-03-31 00:26:32 +04:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SIOCSIFFLAGS:
|
|
|
|
if ((ifp->if_flags & IFF_UP) == 0 &&
|
|
|
|
sc->qe_flags & QEF_RUNNING) {
|
1995-12-01 22:37:55 +03:00
|
|
|
sc->qe_vaddr->qe_csr = QE_RESET;
|
1995-03-31 00:26:32 +04:00
|
|
|
sc->qe_flags &= ~QEF_RUNNING;
|
|
|
|
} else if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) ==
|
|
|
|
IFF_RUNNING && (sc->qe_flags & QEF_RUNNING) == 0)
|
|
|
|
qerestart(sc);
|
1997-02-12 20:57:39 +03:00
|
|
|
else
|
|
|
|
qeinit(sc);
|
|
|
|
|
1995-03-31 00:26:32 +04:00
|
|
|
break;
|
|
|
|
|
1997-05-02 21:11:24 +04:00
|
|
|
case SIOCADDMULTI:
|
|
|
|
case SIOCDELMULTI:
|
|
|
|
/*
|
|
|
|
* Update our multicast list.
|
|
|
|
*/
|
|
|
|
error = (cmd == SIOCADDMULTI) ?
|
|
|
|
ether_addmulti(ifr, &sc->qe_ec):
|
|
|
|
ether_delmulti(ifr, &sc->qe_ec);
|
|
|
|
|
|
|
|
if (error == ENETRESET) {
|
|
|
|
/*
|
|
|
|
* Multicast list has changed; set the hardware filter
|
|
|
|
* accordingly.
|
|
|
|
*/
|
|
|
|
qeinit(sc);
|
|
|
|
error = 0;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
1995-03-31 00:26:32 +04:00
|
|
|
default:
|
|
|
|
error = EINVAL;
|
|
|
|
|
|
|
|
}
|
|
|
|
splx(s);
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* set ethernet address for unit
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
void
|
1996-05-07 05:35:48 +04:00
|
|
|
qe_setaddr(physaddr, sc)
|
1995-03-31 00:26:32 +04:00
|
|
|
u_char *physaddr;
|
1996-05-07 05:35:48 +04:00
|
|
|
struct qe_softc *sc;
|
1995-03-31 00:26:32 +04:00
|
|
|
{
|
|
|
|
register int i;
|
|
|
|
|
|
|
|
for (i = 0; i < 6; i++)
|
1997-03-15 21:09:08 +03:00
|
|
|
sc->setup_pkt[i][1] = LLADDR(sc->qe_if.if_sadl)[i]
|
|
|
|
= physaddr[i];
|
1995-03-31 00:26:32 +04:00
|
|
|
sc->qe_flags |= QEF_SETADDR;
|
|
|
|
if (sc->qe_if.if_flags & IFF_RUNNING)
|
|
|
|
qesetup(sc);
|
1996-05-07 05:35:48 +04:00
|
|
|
qeinit(sc);
|
1995-03-31 00:26:32 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialize a ring descriptor with mbuf allocation side effects
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
void
|
1995-03-31 00:26:32 +04:00
|
|
|
qeinitdesc(rp, addr, len)
|
1995-12-01 22:37:55 +03:00
|
|
|
register struct qe_ring *rp;
|
1997-04-19 19:02:27 +04:00
|
|
|
caddr_t addr; /* mapped address */
|
1995-03-31 00:26:32 +04:00
|
|
|
int len;
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* clear the entire descriptor
|
|
|
|
*/
|
|
|
|
bzero((caddr_t)rp, sizeof(struct qe_ring));
|
|
|
|
|
1995-12-01 22:37:55 +03:00
|
|
|
if (len) {
|
1995-03-31 00:26:32 +04:00
|
|
|
rp->qe_buf_len = -(len/2);
|
|
|
|
rp->qe_addr_lo = (short)((int)addr);
|
|
|
|
rp->qe_addr_hi = (short)((int)addr >> 16);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* Build a setup packet - the physical address will already be present
|
|
|
|
* in first column.
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
void
|
|
|
|
qesetup(sc)
|
|
|
|
struct qe_softc *sc;
|
1995-03-31 00:26:32 +04:00
|
|
|
{
|
|
|
|
register i, j;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Copy the target address to the rest of the entries in this row.
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
for (j = 0; j < 6; j++)
|
|
|
|
for (i = 2; i < 8; i++)
|
1995-03-31 00:26:32 +04:00
|
|
|
sc->setup_pkt[j][i] = sc->setup_pkt[j][1];
|
|
|
|
/*
|
|
|
|
* Duplicate the first half.
|
|
|
|
*/
|
|
|
|
bcopy((caddr_t)sc->setup_pkt[0], (caddr_t)sc->setup_pkt[8], 64);
|
|
|
|
/*
|
|
|
|
* Fill in the broadcast (and ISO multicast) address(es).
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
for (i = 0; i < 6; i++) {
|
1995-03-31 00:26:32 +04:00
|
|
|
sc->setup_pkt[i][2] = 0xff;
|
|
|
|
#ifdef ISO
|
1997-05-02 21:11:24 +04:00
|
|
|
/*
|
|
|
|
* XXX layer violation, should use SIOCADDMULTI.
|
|
|
|
* Will definitely break with IPmulticast.
|
|
|
|
*/
|
|
|
|
|
1995-03-31 00:26:32 +04:00
|
|
|
sc->setup_pkt[i][3] = all_es_snpa[i];
|
|
|
|
sc->setup_pkt[i][4] = all_is_snpa[i];
|
|
|
|
sc->setup_pkt[i][5] = all_l1is_snpa[i];
|
|
|
|
sc->setup_pkt[i][6] = all_l2is_snpa[i];
|
|
|
|
#endif
|
|
|
|
}
|
1997-05-02 21:11:24 +04:00
|
|
|
if (sc->qe_if.if_flags & IFF_PROMISC) {
|
|
|
|
sc->setuplength = QE_PROMISC;
|
|
|
|
/* XXX no IFF_ALLMULTI support in 4.4bsd */
|
|
|
|
} else if (sc->qe_if.if_flags & IFF_ALLMULTI) {
|
|
|
|
sc->setuplength = QE_ALLMULTI;
|
|
|
|
} else {
|
|
|
|
register k;
|
|
|
|
struct ether_multi *enm;
|
|
|
|
struct ether_multistep step;
|
|
|
|
/*
|
|
|
|
* Step through our list of multicast addresses, putting them
|
|
|
|
* in the third through fourteenth address slots of the setup
|
|
|
|
* packet. (See the DEQNA manual to understand the peculiar
|
|
|
|
* layout of the bytes within the setup packet.) If we have
|
|
|
|
* too many multicast addresses, or if we have to listen to
|
|
|
|
* a range of multicast addresses, turn on reception of all
|
|
|
|
* multicasts.
|
|
|
|
*/
|
|
|
|
sc->setuplength = QE_SOMEMULTI;
|
|
|
|
i = 2;
|
|
|
|
k = 0;
|
|
|
|
ETHER_FIRST_MULTI(step, &sc->qe_ec, enm);
|
|
|
|
while (enm != NULL) {
|
|
|
|
if ((++i > 7 && k != 0) ||
|
|
|
|
bcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) {
|
|
|
|
sc->setuplength = QE_ALLMULTI;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (i > 7) {
|
|
|
|
i = 1;
|
|
|
|
k = 8;
|
|
|
|
}
|
|
|
|
for (j = 0; j < 6; j++)
|
|
|
|
sc->setup_pkt[j+k][i] = enm->enm_addrlo[j];
|
|
|
|
ETHER_NEXT_MULTI(step, enm);
|
|
|
|
}
|
|
|
|
}
|
1995-03-31 00:26:32 +04:00
|
|
|
sc->setupqueued++;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Pass a packet to the higher levels.
|
|
|
|
* We deal with the trailer protocol here.
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
void
|
1995-03-31 00:26:32 +04:00
|
|
|
qeread(sc, ifrw, len)
|
1995-12-01 22:37:55 +03:00
|
|
|
register struct qe_softc *sc;
|
|
|
|
struct ifrw *ifrw;
|
1995-03-31 00:26:32 +04:00
|
|
|
int len;
|
|
|
|
{
|
|
|
|
struct ether_header *eh;
|
1997-04-19 19:02:27 +04:00
|
|
|
struct mbuf *m;
|
1995-03-31 00:26:32 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Deal with trailer protocol: if type is INET trailer
|
|
|
|
* get true type from first 16-bit word past data.
|
|
|
|
* Remember that type was trailer by setting off.
|
|
|
|
*/
|
|
|
|
|
|
|
|
eh = (struct ether_header *)ifrw->ifrw_addr;
|
|
|
|
if (len == 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Pull packet off interface. Off is nonzero if packet
|
|
|
|
* has trailing header; qeget will then force this header
|
|
|
|
* information to be at the front, but we still have to drop
|
|
|
|
* the type and length which are at the front of any trailer data.
|
|
|
|
*/
|
1995-04-11 10:16:33 +04:00
|
|
|
m = if_ubaget(&sc->qe_uba, ifrw, len, &sc->qe_if);
|
1995-03-31 00:26:32 +04:00
|
|
|
#ifdef notdef
|
|
|
|
if (m) {
|
|
|
|
*(((u_long *)m->m_data)+0),
|
|
|
|
*(((u_long *)m->m_data)+1),
|
|
|
|
*(((u_long *)m->m_data)+2),
|
|
|
|
*(((u_long *)m->m_data)+3)
|
1997-05-02 21:11:24 +04:00
|
|
|
; }
|
1995-03-31 00:26:32 +04:00
|
|
|
#endif
|
|
|
|
|
1997-05-02 21:11:24 +04:00
|
|
|
#if NBPFILTER > 0
|
|
|
|
/*
|
|
|
|
* Check for a BPF filter; if so, hand it up.
|
|
|
|
* Note that we have to stick an extra mbuf up front, because
|
|
|
|
* bpf_mtap expects to have the ether header at the front.
|
|
|
|
* It doesn't matter that this results in an ill-formatted mbuf chain,
|
|
|
|
* since BPF just looks at the data. (It doesn't try to free the mbuf,
|
|
|
|
* tho' it will make a copy for tcpdump.)
|
|
|
|
*/
|
|
|
|
if (sc->qe_if.if_bpf) {
|
|
|
|
struct mbuf m0;
|
|
|
|
m0.m_len = sizeof (struct ether_header);
|
|
|
|
m0.m_data = (caddr_t)eh;
|
|
|
|
m0.m_next = m;
|
|
|
|
|
|
|
|
/* Pass it up */
|
|
|
|
bpf_mtap(sc->qe_if.if_bpf, &m0);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Note that the interface cannot be in promiscuous mode if
|
|
|
|
* there are no BPF listeners. And if we are in promiscuous
|
|
|
|
* mode, we have to check if this packet is really ours.
|
|
|
|
*/
|
1998-06-21 01:01:43 +04:00
|
|
|
if ((sc->qe_if.if_flags & IFF_PROMISC) &&
|
1997-05-02 21:11:24 +04:00
|
|
|
(eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */
|
|
|
|
bcmp(eh->ether_dhost, LLADDR(sc->qe_if.if_sadl),
|
|
|
|
sizeof(eh->ether_dhost)) != 0) {
|
|
|
|
m_freem(m);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif /* NBPFILTER > 0 */
|
|
|
|
|
1995-03-31 00:26:32 +04:00
|
|
|
if (m)
|
|
|
|
ether_input((struct ifnet *)&sc->qe_if, eh, m);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Watchdog timeout routine. There is a condition in the hardware that
|
|
|
|
* causes the board to lock up under heavy load. This routine detects
|
|
|
|
* the hang up and restarts the device.
|
|
|
|
*/
|
1995-11-10 22:25:46 +03:00
|
|
|
void
|
1996-05-07 05:35:48 +04:00
|
|
|
qetimeout(ifp)
|
|
|
|
struct ifnet *ifp;
|
1995-03-31 00:26:32 +04:00
|
|
|
{
|
1996-05-07 05:35:48 +04:00
|
|
|
register struct qe_softc *sc = ifp->if_softc;
|
1995-03-31 00:26:32 +04:00
|
|
|
|
|
|
|
#ifdef notdef
|
1996-05-07 05:35:48 +04:00
|
|
|
log(LOG_ERR, "%s: transmit timeout, restarted %d\n",
|
|
|
|
sc->sc_dev.dv_xname, sc->qe_restarts++);
|
1995-03-31 00:26:32 +04:00
|
|
|
#endif
|
|
|
|
qerestart(sc);
|
|
|
|
}
|
|
|
|
/*
|
|
|
|
* Restart for board lockup problem.
|
|
|
|
*/
|
1995-12-01 22:37:55 +03:00
|
|
|
void
|
1995-03-31 00:26:32 +04:00
|
|
|
qerestart(sc)
|
1995-12-01 22:37:55 +03:00
|
|
|
struct qe_softc *sc;
|
1995-03-31 00:26:32 +04:00
|
|
|
{
|
|
|
|
register struct ifnet *ifp = (struct ifnet *)&sc->qe_if;
|
1995-12-01 22:37:55 +03:00
|
|
|
register struct qedevice *addr = sc->addr;
|
|
|
|
register struct qe_ring *rp;
|
1995-03-31 00:26:32 +04:00
|
|
|
register i;
|
|
|
|
|
|
|
|
addr->qe_csr = QE_RESET;
|
|
|
|
addr->qe_csr &= ~QE_RESET;
|
1995-12-01 22:37:55 +03:00
|
|
|
qesetup(sc);
|
1995-03-31 00:26:32 +04:00
|
|
|
for (i = 0, rp = sc->tring; i < NXMT; rp++, i++) {
|
|
|
|
rp->qe_flag = rp->qe_status1 = QE_NOTYET;
|
|
|
|
rp->qe_valid = 0;
|
|
|
|
}
|
|
|
|
sc->nxmit = sc->otindex = sc->tindex = sc->rindex = 0;
|
|
|
|
addr->qe_csr = QE_RCV_ENABLE | QE_INT_ENABLE | QE_XMIT_INT |
|
|
|
|
QE_RCV_INT | QE_ILOOP;
|
|
|
|
addr->qe_rcvlist_lo = (short)((int)sc->rringaddr);
|
|
|
|
addr->qe_rcvlist_hi = (short)((int)sc->rringaddr >> 16);
|
|
|
|
sc->qe_flags |= QEF_RUNNING;
|
1995-04-11 10:16:33 +04:00
|
|
|
qestart(ifp);
|
1995-03-31 00:26:32 +04:00
|
|
|
}
|