1999-11-08 06:00:32 +03:00
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/* $NetBSD: tcds.c,v 1.29 1999/11/08 03:00:32 mhitch Exp $ */
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1998-05-25 03:41:42 +04:00
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
|
1995-02-14 02:06:39 +03:00
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/*
|
1996-04-12 10:07:05 +04:00
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* Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
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1995-02-14 02:06:39 +03:00
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* All rights reserved.
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*
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* Author: Keith Bostic, Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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1997-04-08 03:39:37 +04:00
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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1999-11-08 06:00:32 +03:00
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__KERNEL_RCSID(0, "$NetBSD: tcds.c,v 1.29 1999/11/08 03:00:32 mhitch Exp $");
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1997-04-07 02:31:45 +04:00
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1995-02-14 02:06:39 +03:00
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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1998-05-27 03:43:05 +04:00
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#ifdef __alpha__
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1995-02-14 02:06:39 +03:00
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#include <machine/rpb.h>
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1996-06-05 04:30:48 +04:00
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#ifndef EVCNT_COUNTERS
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#include <machine/intrcnt.h>
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#endif
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1998-05-27 03:43:05 +04:00
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#endif /* __alpha__ */
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1995-02-14 02:06:39 +03:00
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1998-05-25 03:41:42 +04:00
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#include <machine/bus.h>
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1995-12-20 03:40:21 +03:00
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#include <dev/tc/tcreg.h>
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#include <dev/tc/tcvar.h>
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#include <alpha/tc/tcdsreg.h>
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#include <alpha/tc/tcdsvar.h>
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1995-02-14 02:06:39 +03:00
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1998-05-25 03:41:42 +04:00
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipiconf.h>
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#include <dev/ic/ncr53c9xvar.h>
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#include "locators.h"
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1995-02-14 02:06:39 +03:00
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struct tcds_softc {
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struct device sc_dv;
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1998-05-25 03:41:42 +04:00
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bus_space_tag_t sc_bst;
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bus_space_handle_t sc_bsh;
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1998-05-27 03:43:05 +04:00
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bus_dma_tag_t sc_dmat;
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1995-12-20 03:40:21 +03:00
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void *sc_cookie;
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1998-05-25 03:41:42 +04:00
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int sc_flags;
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1995-12-20 03:40:21 +03:00
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struct tcds_slotconfig sc_slots[2];
|
1995-02-14 02:06:39 +03:00
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};
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1998-05-25 03:41:42 +04:00
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/* sc_flags */
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#define TCDSF_BASEBOARD 0x01 /* baseboard on DEC 3000 */
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1998-05-27 03:43:05 +04:00
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#define TCDSF_FASTSCSI 0x02 /* supports Fast SCSI */
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1998-05-25 03:41:42 +04:00
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|
1995-02-14 02:06:39 +03:00
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/* Definition of the driver for autoconfig. */
|
1996-12-05 04:39:27 +03:00
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int tcdsmatch __P((struct device *, struct cfdata *, void *));
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1995-02-14 02:06:39 +03:00
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void tcdsattach __P((struct device *, struct device *, void *));
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1998-05-25 03:41:42 +04:00
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int tcdsprint __P((void *, const char *));
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int tcdssubmatch __P((struct device *, struct cfdata *, void *));
|
1996-03-17 04:03:02 +03:00
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struct cfattach tcds_ca = {
|
1996-04-12 05:31:43 +04:00
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sizeof(struct tcds_softc), tcdsmatch, tcdsattach,
|
1996-03-17 04:03:02 +03:00
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};
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1995-12-20 03:40:21 +03:00
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/*static*/ int tcds_intr __P((void *));
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/*static*/ int tcds_intrnull __P((void *));
|
1995-02-14 02:06:39 +03:00
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1998-05-25 03:41:42 +04:00
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struct tcds_device {
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const char *td_name;
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int td_flags;
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} tcds_devices[] = {
|
1998-05-27 03:43:05 +04:00
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#ifdef __alpha__
|
1998-05-25 03:41:42 +04:00
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{ "PMAZ-DS ", TCDSF_BASEBOARD },
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{ "PMAZ-FS ", TCDSF_BASEBOARD|TCDSF_FASTSCSI },
|
1998-05-27 03:43:05 +04:00
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#endif /* __alpha__ */
|
1998-05-25 03:41:42 +04:00
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{ "PMAZB-AA", 0 },
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{ "PMAZC-AA", TCDSF_FASTSCSI },
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{ NULL, 0 },
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};
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struct tcds_device *tcds_lookup __P((const char *));
|
1998-05-25 05:14:38 +04:00
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void tcds_params __P((struct tcds_softc *, int, int *, int *));
|
1998-05-25 03:41:42 +04:00
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struct tcds_device *
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tcds_lookup(modname)
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const char *modname;
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{
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struct tcds_device *td;
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for (td = tcds_devices; td->td_name != NULL; td++)
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if (strncmp(td->td_name, modname, TC_ROM_LLEN) == 0)
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return (td);
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return (NULL);
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}
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|
1995-02-14 02:06:39 +03:00
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int
|
1995-12-20 03:40:21 +03:00
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tcdsmatch(parent, cfdata, aux)
|
1995-02-14 02:06:39 +03:00
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struct device *parent;
|
1996-12-05 04:39:27 +03:00
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struct cfdata *cfdata;
|
1995-12-20 03:40:21 +03:00
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void *aux;
|
1995-02-14 02:06:39 +03:00
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{
|
1996-04-12 05:31:43 +04:00
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struct tc_attach_args *ta = aux;
|
1995-02-14 02:06:39 +03:00
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|
1998-05-25 03:41:42 +04:00
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return (tcds_lookup(ta->ta_modname) != NULL);
|
1995-02-14 02:06:39 +03:00
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}
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void
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tcdsattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct tcds_softc *sc = (struct tcds_softc *)self;
|
1996-04-12 05:31:43 +04:00
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struct tc_attach_args *ta = aux;
|
1995-12-20 03:40:21 +03:00
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struct tcdsdev_attach_args tcdsdev;
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struct tcds_slotconfig *slotc;
|
1998-05-25 03:41:42 +04:00
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struct tcds_device *td;
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bus_space_handle_t sbsh[2];
|
1998-05-27 03:43:05 +04:00
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int i, error, gpi2;
|
1995-02-14 02:06:39 +03:00
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|
1998-05-25 03:41:42 +04:00
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td = tcds_lookup(ta->ta_modname);
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|
if (td == NULL)
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|
panic("\ntcdsattach: impossible");
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|
printf(": TurboChannel Dual SCSI");
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|
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if (td->td_flags & TCDSF_BASEBOARD)
|
1998-05-27 03:43:05 +04:00
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|
printf(" (baseboard)");
|
1996-10-13 06:59:55 +04:00
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printf("\n");
|
1995-02-14 02:06:39 +03:00
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1998-05-25 03:41:42 +04:00
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sc->sc_flags = td->td_flags;
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|
1998-05-27 03:43:05 +04:00
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sc->sc_bst = ta->ta_memt;
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sc->sc_dmat = ta->ta_dmat;
|
1998-05-25 05:14:38 +04:00
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1998-05-25 03:41:42 +04:00
|
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/*
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* Map the device.
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*/
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|
if (bus_space_map(sc->sc_bst, ta->ta_addr,
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|
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(TCDS_SCSI1_OFFSET + 0x100), 0, &sc->sc_bsh)) {
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printf("%s: unable to map device\n", sc->sc_dv.dv_xname);
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return;
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}
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|
|
/*
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|
|
|
* Now, slice off two subregions for the individual NCR SCSI chips.
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|
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|
*/
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|
|
if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI0_OFFSET,
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0x100, &sbsh[0]) ||
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bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI1_OFFSET,
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|
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0x100, &sbsh[1])) {
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|
printf("%s: unable to subregion SCSI chip space\n",
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|
|
sc->sc_dv.dv_xname);
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return;
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}
|
1995-02-14 02:06:39 +03:00
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|
1998-05-25 03:41:42 +04:00
|
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|
sc->sc_cookie = ta->ta_cookie;
|
1995-02-14 02:06:39 +03:00
|
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|
1995-12-20 03:40:21 +03:00
|
|
|
tc_intr_establish(parent, sc->sc_cookie, TC_IPL_BIO, tcds_intr, sc);
|
1995-02-14 02:06:39 +03:00
|
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|
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/*
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|
|
|
* XXX
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|
|
|
* IMER apparently has some random (or, not so random, but still
|
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|
|
* not useful) bits set in it when the system boots. Clear it.
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|
|
*/
|
1998-05-25 03:41:42 +04:00
|
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|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, 0);
|
1995-02-14 02:06:39 +03:00
|
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|
1995-12-20 03:40:21 +03:00
|
|
|
/* XXX Initial contents of CIR? */
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|
1998-05-27 03:43:05 +04:00
|
|
|
/*
|
|
|
|
* Remember if GPI2 is set in the CIR; we'll need it later.
|
|
|
|
*/
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|
gpi2 = (bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR) &
|
|
|
|
TCDS_CIR_GPI_2) != 0;
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|
|
|
|
1995-12-20 03:40:21 +03:00
|
|
|
/*
|
|
|
|
* Set up the per-slot defintions for later use.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* fill in common information first */
|
|
|
|
for (i = 0; i < 2; i++) {
|
|
|
|
slotc = &sc->sc_slots[i];
|
|
|
|
|
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|
|
bzero(slotc, sizeof *slotc); /* clear everything */
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|
|
|
|
|
|
|
slotc->sc_slot = i;
|
1998-05-25 03:41:42 +04:00
|
|
|
slotc->sc_bst = sc->sc_bst;
|
|
|
|
slotc->sc_bsh = sc->sc_bsh;
|
1997-02-27 04:27:54 +03:00
|
|
|
slotc->sc_asc = NULL;
|
1995-12-20 03:40:21 +03:00
|
|
|
slotc->sc_intrhand = tcds_intrnull;
|
|
|
|
slotc->sc_intrarg = (void *)(long)i;
|
1998-05-27 03:43:05 +04:00
|
|
|
slotc->sc_dmat = sc->sc_dmat;
|
|
|
|
if ((error = tcds_dma_init(slotc)) != 0) {
|
|
|
|
printf("%s: tcds_dma_init failed, error = %d\n",
|
|
|
|
sc->sc_dv.dv_xname, error);
|
|
|
|
return;
|
|
|
|
}
|
1995-12-20 03:40:21 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/* information for slot 0 */
|
|
|
|
slotc = &sc->sc_slots[0];
|
|
|
|
slotc->sc_resetbits = TCDS_CIR_SCSI0_RESET;
|
|
|
|
slotc->sc_intrmaskbits =
|
|
|
|
TCDS_IMER_SCSI0_MASK | TCDS_IMER_SCSI0_ENB;
|
|
|
|
slotc->sc_intrbits = TCDS_CIR_SCSI0_INT;
|
|
|
|
slotc->sc_dmabits = TCDS_CIR_SCSI0_DMAENA;
|
|
|
|
slotc->sc_errorbits = 0; /* XXX */
|
1998-05-25 03:41:42 +04:00
|
|
|
slotc->sc_sda = TCDS_SCSI0_DMA_ADDR;
|
|
|
|
slotc->sc_dic = TCDS_SCSI0_DMA_INTR;
|
|
|
|
slotc->sc_dud0 = TCDS_SCSI0_DMA_DUD0;
|
|
|
|
slotc->sc_dud1 = TCDS_SCSI0_DMA_DUD1;
|
1995-12-20 03:40:21 +03:00
|
|
|
|
|
|
|
/* information for slot 1 */
|
|
|
|
slotc = &sc->sc_slots[1];
|
|
|
|
slotc->sc_resetbits = TCDS_CIR_SCSI1_RESET;
|
|
|
|
slotc->sc_intrmaskbits =
|
|
|
|
TCDS_IMER_SCSI1_MASK | TCDS_IMER_SCSI1_ENB;
|
|
|
|
slotc->sc_intrbits = TCDS_CIR_SCSI1_INT;
|
|
|
|
slotc->sc_dmabits = TCDS_CIR_SCSI1_DMAENA;
|
|
|
|
slotc->sc_errorbits = 0; /* XXX */
|
1998-05-25 03:41:42 +04:00
|
|
|
slotc->sc_sda = TCDS_SCSI1_DMA_ADDR;
|
|
|
|
slotc->sc_dic = TCDS_SCSI1_DMA_INTR;
|
|
|
|
slotc->sc_dud0 = TCDS_SCSI1_DMA_DUD0;
|
|
|
|
slotc->sc_dud1 = TCDS_SCSI1_DMA_DUD1;
|
1995-12-20 03:40:21 +03:00
|
|
|
|
1995-03-08 03:38:44 +03:00
|
|
|
/* find the hardware attached to the TCDS ASIC */
|
1998-05-25 03:41:42 +04:00
|
|
|
for (i = 0; i < 2; i++) {
|
1998-05-27 03:43:05 +04:00
|
|
|
tcds_params(sc, i, &tcdsdev.tcdsda_id,
|
|
|
|
&tcdsdev.tcdsda_fast);
|
1998-05-25 05:14:38 +04:00
|
|
|
|
1998-05-25 03:41:42 +04:00
|
|
|
tcdsdev.tcdsda_bst = sc->sc_bst;
|
|
|
|
tcdsdev.tcdsda_bsh = sbsh[i];
|
|
|
|
tcdsdev.tcdsda_chip = i;
|
|
|
|
tcdsdev.tcdsda_sc = &sc->sc_slots[i];
|
1998-05-27 03:43:05 +04:00
|
|
|
/*
|
1999-09-22 07:32:42 +04:00
|
|
|
* Determine the chip frequency. TCDSF_FASTSCSI will be set
|
|
|
|
* for TC option cards. For baseboard chips, GPI2 is set, for a
|
1998-05-27 03:43:05 +04:00
|
|
|
* 25MHz clock, else a 40MHz clock.
|
|
|
|
*/
|
1999-09-22 07:32:42 +04:00
|
|
|
if ((sc->sc_flags & TCDSF_BASEBOARD && gpi2 == 0) ||
|
|
|
|
sc->sc_flags & TCDSF_FASTSCSI) {
|
1998-05-27 03:43:05 +04:00
|
|
|
tcdsdev.tcdsda_freq = 40000000;
|
|
|
|
tcdsdev.tcdsda_period = tcdsdev.tcdsda_fast ? 4 : 8;
|
1999-09-22 07:32:42 +04:00
|
|
|
} else {
|
|
|
|
tcdsdev.tcdsda_freq = 25000000;
|
|
|
|
tcdsdev.tcdsda_period = 5;
|
1998-05-27 03:43:05 +04:00
|
|
|
}
|
|
|
|
if (sc->sc_flags & TCDSF_BASEBOARD)
|
1998-05-25 03:41:42 +04:00
|
|
|
tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C94;
|
1998-05-27 03:43:05 +04:00
|
|
|
else
|
|
|
|
tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C96;
|
1995-12-20 03:40:21 +03:00
|
|
|
|
|
|
|
tcds_scsi_reset(tcdsdev.tcdsda_sc);
|
|
|
|
|
1998-05-25 03:41:42 +04:00
|
|
|
config_found_sm(self, &tcdsdev, tcdsprint, tcdssubmatch);
|
|
|
|
#ifdef __alpha__
|
|
|
|
/*
|
|
|
|
* The second SCSI chip isn't present on the baseboard TCDS
|
|
|
|
* on the DEC Alpha 3000/300 series.
|
|
|
|
*/
|
|
|
|
if (sc->sc_flags & TCDSF_BASEBOARD &&
|
|
|
|
cputype == ST_DEC_3000_300)
|
|
|
|
break;
|
|
|
|
#endif /* __alpha__ */
|
1995-02-14 02:06:39 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
1998-05-25 03:41:42 +04:00
|
|
|
int
|
|
|
|
tcdssubmatch(parent, cf, aux)
|
|
|
|
struct device *parent;
|
|
|
|
struct cfdata *cf;
|
|
|
|
void *aux;
|
|
|
|
{
|
|
|
|
struct tcdsdev_attach_args *tcdsdev = aux;
|
|
|
|
|
|
|
|
if (cf->cf_loc[TCDSCF_CHIP] != TCDSCF_CHIP_DEFAULT &&
|
|
|
|
cf->cf_loc[TCDSCF_CHIP] != tcdsdev->tcdsda_chip)
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
return ((*cf->cf_attach->ca_match)(parent, cf, aux));
|
|
|
|
}
|
|
|
|
|
1995-02-14 02:06:39 +03:00
|
|
|
int
|
|
|
|
tcdsprint(aux, pnp)
|
|
|
|
void *aux;
|
1996-08-28 01:53:46 +04:00
|
|
|
const char *pnp;
|
1995-02-14 02:06:39 +03:00
|
|
|
{
|
1998-05-25 03:41:42 +04:00
|
|
|
struct tcdsdev_attach_args *tcdsdev = aux;
|
1995-02-14 02:06:39 +03:00
|
|
|
|
1998-05-25 03:41:42 +04:00
|
|
|
/* Only ASCs can attach to TCDSs; easy. */
|
1995-02-14 02:06:39 +03:00
|
|
|
if (pnp)
|
1998-05-25 03:41:42 +04:00
|
|
|
printf("asc at %s", pnp);
|
|
|
|
|
|
|
|
printf(" chip %d", tcdsdev->tcdsda_chip);
|
|
|
|
|
1995-02-14 02:06:39 +03:00
|
|
|
return (UNCONF);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
1998-05-25 03:41:42 +04:00
|
|
|
tcds_intr_establish(tcds, slot, func, arg)
|
1995-12-20 03:40:21 +03:00
|
|
|
struct device *tcds;
|
1998-05-25 03:41:42 +04:00
|
|
|
int slot;
|
1995-12-20 03:40:21 +03:00
|
|
|
int (*func) __P((void *));
|
1998-05-25 03:41:42 +04:00
|
|
|
void *arg;
|
1995-02-14 02:06:39 +03:00
|
|
|
{
|
1995-12-20 03:40:21 +03:00
|
|
|
struct tcds_softc *sc = (struct tcds_softc *)tcds;
|
1995-03-08 03:38:44 +03:00
|
|
|
|
1995-12-20 03:40:21 +03:00
|
|
|
if (sc->sc_slots[slot].sc_intrhand != tcds_intrnull)
|
1998-05-25 03:41:42 +04:00
|
|
|
panic("tcds_intr_establish: chip %d twice", slot);
|
1995-03-08 03:38:44 +03:00
|
|
|
|
1995-12-20 03:40:21 +03:00
|
|
|
sc->sc_slots[slot].sc_intrhand = func;
|
|
|
|
sc->sc_slots[slot].sc_intrarg = arg;
|
|
|
|
tcds_scsi_reset(&sc->sc_slots[slot]);
|
1995-02-14 02:06:39 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
1998-05-25 03:41:42 +04:00
|
|
|
tcds_intr_disestablish(tcds, slot)
|
1995-12-20 03:40:21 +03:00
|
|
|
struct device *tcds;
|
1998-05-25 03:41:42 +04:00
|
|
|
int slot;
|
1995-02-14 02:06:39 +03:00
|
|
|
{
|
1995-12-20 03:40:21 +03:00
|
|
|
struct tcds_softc *sc = (struct tcds_softc *)tcds;
|
1995-02-14 02:06:39 +03:00
|
|
|
|
1995-12-20 03:40:21 +03:00
|
|
|
if (sc->sc_slots[slot].sc_intrhand == tcds_intrnull)
|
1998-05-25 03:41:42 +04:00
|
|
|
panic("tcds_intr_disestablish: chip %d missing intr",
|
1995-12-20 03:40:21 +03:00
|
|
|
slot);
|
1995-02-14 02:06:39 +03:00
|
|
|
|
1995-12-20 03:40:21 +03:00
|
|
|
sc->sc_slots[slot].sc_intrhand = tcds_intrnull;
|
1998-05-25 03:41:42 +04:00
|
|
|
sc->sc_slots[slot].sc_intrarg = (void *)(u_long)slot;
|
1995-02-14 02:06:39 +03:00
|
|
|
|
1995-12-20 03:40:21 +03:00
|
|
|
tcds_dma_enable(&sc->sc_slots[slot], 0);
|
|
|
|
tcds_scsi_enable(&sc->sc_slots[slot], 0);
|
1995-02-14 02:06:39 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
tcds_intrnull(val)
|
|
|
|
void *val;
|
|
|
|
{
|
|
|
|
|
1998-05-25 03:41:42 +04:00
|
|
|
panic("tcds_intrnull: uncaught TCDS intr for chip %lu\n",
|
1995-12-20 03:40:21 +03:00
|
|
|
(u_long)val);
|
1995-02-14 02:06:39 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
1995-12-20 03:40:21 +03:00
|
|
|
tcds_scsi_reset(sc)
|
|
|
|
struct tcds_slotconfig *sc;
|
1995-02-14 02:06:39 +03:00
|
|
|
{
|
1998-05-25 03:41:42 +04:00
|
|
|
u_int32_t cir;
|
1995-02-14 02:06:39 +03:00
|
|
|
|
1995-12-20 03:40:21 +03:00
|
|
|
tcds_dma_enable(sc, 0);
|
|
|
|
tcds_scsi_enable(sc, 0);
|
1995-02-14 02:06:39 +03:00
|
|
|
|
1998-05-25 03:41:42 +04:00
|
|
|
cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
|
|
|
|
TCDS_CIR_CLR(cir, sc->sc_resetbits);
|
|
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
|
|
|
|
|
1995-12-20 03:40:21 +03:00
|
|
|
DELAY(1);
|
1998-05-25 03:41:42 +04:00
|
|
|
|
|
|
|
cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
|
|
|
|
TCDS_CIR_SET(cir, sc->sc_resetbits);
|
|
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
|
1995-02-14 02:06:39 +03:00
|
|
|
|
1995-12-20 03:40:21 +03:00
|
|
|
tcds_scsi_enable(sc, 1);
|
|
|
|
tcds_dma_enable(sc, 1);
|
1995-02-14 02:06:39 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
1995-12-20 03:40:21 +03:00
|
|
|
tcds_scsi_enable(sc, on)
|
|
|
|
struct tcds_slotconfig *sc;
|
|
|
|
int on;
|
1995-02-14 02:06:39 +03:00
|
|
|
{
|
1998-05-25 03:41:42 +04:00
|
|
|
u_int32_t imer;
|
1995-02-14 02:06:39 +03:00
|
|
|
|
1998-05-25 03:41:42 +04:00
|
|
|
imer = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER);
|
|
|
|
|
|
|
|
if (on)
|
|
|
|
imer |= sc->sc_intrmaskbits;
|
1995-12-20 03:40:21 +03:00
|
|
|
else
|
1998-05-25 03:41:42 +04:00
|
|
|
imer &= ~sc->sc_intrmaskbits;
|
|
|
|
|
|
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, imer);
|
1995-02-14 02:06:39 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
1995-12-20 03:40:21 +03:00
|
|
|
tcds_dma_enable(sc, on)
|
|
|
|
struct tcds_slotconfig *sc;
|
|
|
|
int on;
|
1995-02-14 02:06:39 +03:00
|
|
|
{
|
1998-05-25 03:41:42 +04:00
|
|
|
u_int32_t cir;
|
|
|
|
|
|
|
|
cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
|
1995-02-14 02:06:39 +03:00
|
|
|
|
|
|
|
/* XXX Clear/set IOSLOT/PBS bits. */
|
1995-12-20 03:40:21 +03:00
|
|
|
if (on)
|
1998-05-25 03:41:42 +04:00
|
|
|
TCDS_CIR_SET(cir, sc->sc_dmabits);
|
1995-12-20 03:40:21 +03:00
|
|
|
else
|
1998-05-25 03:41:42 +04:00
|
|
|
TCDS_CIR_CLR(cir, sc->sc_dmabits);
|
|
|
|
|
|
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
|
1995-02-14 02:06:39 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
1995-12-20 03:40:21 +03:00
|
|
|
tcds_scsi_isintr(sc, clear)
|
|
|
|
struct tcds_slotconfig *sc;
|
|
|
|
int clear;
|
1995-02-14 02:06:39 +03:00
|
|
|
{
|
1998-05-25 03:41:42 +04:00
|
|
|
u_int32_t cir;
|
1995-02-14 02:06:39 +03:00
|
|
|
|
1998-05-25 03:41:42 +04:00
|
|
|
cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
|
|
|
|
|
|
|
|
if ((cir & sc->sc_intrbits) != 0) {
|
1995-12-20 03:40:21 +03:00
|
|
|
if (clear) {
|
1998-05-25 03:41:42 +04:00
|
|
|
TCDS_CIR_CLR(cir, sc->sc_intrbits);
|
|
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR,
|
|
|
|
cir);
|
1995-02-14 02:06:39 +03:00
|
|
|
}
|
1995-12-20 03:40:21 +03:00
|
|
|
return (1);
|
|
|
|
} else
|
|
|
|
return (0);
|
1995-02-14 02:06:39 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
1995-12-20 03:40:21 +03:00
|
|
|
tcds_scsi_iserr(sc)
|
|
|
|
struct tcds_slotconfig *sc;
|
1995-02-14 02:06:39 +03:00
|
|
|
{
|
1998-05-25 03:41:42 +04:00
|
|
|
u_int32_t cir;
|
1995-02-14 02:06:39 +03:00
|
|
|
|
1998-05-25 03:41:42 +04:00
|
|
|
cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
|
|
|
|
return ((cir & sc->sc_errorbits) != 0);
|
1995-02-14 02:06:39 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
1998-05-25 03:41:42 +04:00
|
|
|
tcds_intr(arg)
|
|
|
|
void *arg;
|
1995-02-14 02:06:39 +03:00
|
|
|
{
|
1998-05-25 03:41:42 +04:00
|
|
|
struct tcds_softc *sc = arg;
|
|
|
|
u_int32_t ir, ir0;
|
1995-02-14 02:06:39 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* XXX
|
|
|
|
* Copy and clear (gag!) the interrupts.
|
|
|
|
*/
|
1998-05-25 03:41:42 +04:00
|
|
|
ir = ir0 = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
|
|
|
|
TCDS_CIR_CLR(ir0, TCDS_CIR_ALLINTR);
|
|
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, ir0);
|
1995-12-20 03:40:21 +03:00
|
|
|
tc_syncbus();
|
1995-02-14 02:06:39 +03:00
|
|
|
|
1998-05-25 03:41:42 +04:00
|
|
|
#ifdef __alpha__ /* XXX XXX XXX */
|
1996-06-05 04:30:48 +04:00
|
|
|
#ifdef EVCNT_COUNTERS
|
|
|
|
/* No interrupt counting via evcnt counters */
|
|
|
|
XXX BREAK HERE XXX
|
|
|
|
#else
|
|
|
|
#define INCRINTRCNT(slot) intrcnt[INTRCNT_TCDS + slot]++
|
|
|
|
#endif
|
1998-05-25 03:41:42 +04:00
|
|
|
#else
|
|
|
|
#define INCRINTRCNT(slot) /* nothing */
|
|
|
|
#endif /* __alpha__ */
|
1996-06-05 04:30:48 +04:00
|
|
|
|
1995-12-20 03:40:21 +03:00
|
|
|
#define CHECKINTR(slot) \
|
|
|
|
if (ir & sc->sc_slots[slot].sc_intrbits) { \
|
1996-06-05 04:30:48 +04:00
|
|
|
INCRINTRCNT(slot); \
|
1995-12-20 03:40:21 +03:00
|
|
|
(void)(*sc->sc_slots[slot].sc_intrhand) \
|
|
|
|
(sc->sc_slots[slot].sc_intrarg); \
|
1995-02-14 02:06:39 +03:00
|
|
|
}
|
1995-12-20 03:40:21 +03:00
|
|
|
CHECKINTR(0);
|
|
|
|
CHECKINTR(1);
|
1995-02-14 02:06:39 +03:00
|
|
|
#undef CHECKINTR
|
|
|
|
|
|
|
|
#ifdef DIAGNOSTIC
|
|
|
|
/*
|
|
|
|
* Interrupts not currently handled, but would like to know if they
|
|
|
|
* occur.
|
|
|
|
*
|
|
|
|
* XXX
|
|
|
|
* Don't know if we have to set the interrupt mask and enable bits
|
|
|
|
* in the IMER to allow some of them to happen?
|
|
|
|
*/
|
|
|
|
#define PRINTINTR(msg, bits) \
|
|
|
|
if (ir & bits) \
|
1998-05-25 03:41:42 +04:00
|
|
|
printf("%s: %s", sc->sc_dv.dv_xname, msg);
|
1995-02-14 02:06:39 +03:00
|
|
|
PRINTINTR("SCSI0 DREQ interrupt.\n", TCDS_CIR_SCSI0_DREQ);
|
|
|
|
PRINTINTR("SCSI1 DREQ interrupt.\n", TCDS_CIR_SCSI1_DREQ);
|
|
|
|
PRINTINTR("SCSI0 prefetch interrupt.\n", TCDS_CIR_SCSI0_PREFETCH);
|
|
|
|
PRINTINTR("SCSI1 prefetch interrupt.\n", TCDS_CIR_SCSI1_PREFETCH);
|
|
|
|
PRINTINTR("SCSI0 DMA error.\n", TCDS_CIR_SCSI0_DMA);
|
|
|
|
PRINTINTR("SCSI1 DMA error.\n", TCDS_CIR_SCSI1_DMA);
|
|
|
|
PRINTINTR("SCSI0 DB parity error.\n", TCDS_CIR_SCSI0_DB);
|
|
|
|
PRINTINTR("SCSI1 DB parity error.\n", TCDS_CIR_SCSI1_DB);
|
|
|
|
PRINTINTR("SCSI0 DMA buffer parity error.\n", TCDS_CIR_SCSI0_DMAB_PAR);
|
|
|
|
PRINTINTR("SCSI1 DMA buffer parity error.\n", TCDS_CIR_SCSI1_DMAB_PAR);
|
|
|
|
PRINTINTR("SCSI0 DMA read parity error.\n", TCDS_CIR_SCSI0_DMAR_PAR);
|
|
|
|
PRINTINTR("SCSI1 DMA read parity error.\n", TCDS_CIR_SCSI1_DMAR_PAR);
|
|
|
|
PRINTINTR("TC write parity error.\n", TCDS_CIR_TCIOW_PAR);
|
|
|
|
PRINTINTR("TC I/O address parity error.\n", TCDS_CIR_TCIOA_PAR);
|
|
|
|
#undef PRINTINTR
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* XXX
|
|
|
|
* The MACH source had this, with the comment:
|
|
|
|
* This is wrong, but machine keeps dying.
|
|
|
|
*/
|
|
|
|
DELAY(1);
|
1996-07-09 04:53:48 +04:00
|
|
|
|
|
|
|
return (1);
|
1995-02-14 02:06:39 +03:00
|
|
|
}
|
1998-05-25 05:14:38 +04:00
|
|
|
|
|
|
|
void
|
|
|
|
tcds_params(sc, chip, idp, fastp)
|
|
|
|
struct tcds_softc *sc;
|
|
|
|
int chip, *idp, *fastp;
|
|
|
|
{
|
1998-05-27 03:43:05 +04:00
|
|
|
int id, fast;
|
1998-05-25 05:14:38 +04:00
|
|
|
u_int32_t ids;
|
|
|
|
|
|
|
|
#ifdef __alpha__
|
1999-11-08 06:00:32 +03:00
|
|
|
if (sc->sc_flags & TCDSF_BASEBOARD) {
|
1998-05-27 03:43:05 +04:00
|
|
|
extern u_int8_t dec_3000_scsiid[], dec_3000_scsifast[];
|
|
|
|
|
|
|
|
id = dec_3000_scsiid[chip];
|
|
|
|
fast = dec_3000_scsifast[chip];
|
1998-05-25 05:14:38 +04:00
|
|
|
} else
|
|
|
|
#endif /* __alpha__ */
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* SCSI IDs are stored in the EEPROM, along with whether or
|
|
|
|
* not the device is "fast". Chip 0 is the high nibble,
|
|
|
|
* chip 1 the low nibble.
|
|
|
|
*/
|
|
|
|
ids = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_EEPROM_IDS);
|
|
|
|
if (chip == 0)
|
|
|
|
ids >>= 4;
|
|
|
|
|
1998-05-27 03:43:05 +04:00
|
|
|
id = ids & 0x7;
|
|
|
|
fast = ids & 0x8;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (id < 0 || id > 7) {
|
|
|
|
printf("%s: WARNING: bad SCSI ID %d for chip %d, using 7\n",
|
|
|
|
sc->sc_dv.dv_xname, id, chip);
|
|
|
|
id = 7;
|
1998-05-25 05:14:38 +04:00
|
|
|
}
|
|
|
|
|
1998-05-27 03:43:05 +04:00
|
|
|
if (fast)
|
|
|
|
printf("%s: fast mode set for chip %d\n",
|
1998-05-25 05:14:38 +04:00
|
|
|
sc->sc_dv.dv_xname, chip);
|
1998-05-27 03:43:05 +04:00
|
|
|
|
|
|
|
*idp = id;
|
|
|
|
*fastp = fast;
|
1998-05-25 05:14:38 +04:00
|
|
|
}
|