82 lines
3.0 KiB
C
82 lines
3.0 KiB
C
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/* $NetBSD: ifpgavar.h,v 1.1 2001/10/27 16:19:09 rearnsha Exp $ */
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/*
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* Copyright (c) 2001 ARM Ltd
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the company may not be used to endorse or promote
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* products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <machine/bus.h>
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#include "locators.h"
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/* We statically map the UARTS at boot so that we can access the console
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before we've probed for the IFPGA. */
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#define UART0_BOOT_BASE 0xfde00000
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#define UART1_BOOT_BASE 0xfdf00000
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#define IFPGA_UART0 0x06000000 /* Uart 0 */
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#define IFPGA_UART1 0x07000000 /* Uart 1 */
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typedef paddr_t ifpga_addr_t;
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struct ifpga_softc {
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struct device sc_dev; /* Device node */
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bus_space_tag_t sc_iot; /* Bus tag */
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bus_space_handle_t sc_sc_ioh; /* System Controller handle */
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bus_space_handle_t sc_cm_ioh; /* Core Module handle */
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bus_space_handle_t sc_tmr_ioh; /* Timers handle */
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bus_space_handle_t sc_irq_ioh; /* IRQ controller handle */
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/* Clock variables. */
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int sc_statclock_count;
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int sc_clock_count;
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int sc_clock_ticks_per_256us;
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void * sc_clockintr;
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void * sc_statclockintr;
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};
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#define cf_iobase cf_loc[IFPGACF_OFFSET]
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#define cf_irq cf_loc[IFPGACF_IRQ]
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#define IRQUNK IFPGACF_IRQ_DEFAULT
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struct ifpga_attach_args {
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char *ifa_name; /* Device name */
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bus_space_tag_t ifa_iot; /* Bus space tag for io */
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bus_space_handle_t ifa_sc_ioh; /* System controller handle */
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ifpga_addr_t ifa_addr; /* Address of device. */
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int ifa_irq; /* IRQ to use. */
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/*
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* Other data extracted from the system should go here. Eg UART clock
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* rates.
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*/
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};
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void ifpga_create_io_bs_tag(struct bus_space *, void *);
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void ifpga_create_mem_bs_tag(struct bus_space *, void *);
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