1994-10-26 10:48:18 +03:00
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* $NetBSD: x_fline.sa,v 1.2 1994/10/26 07:50:23 cgd Exp $
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1994-07-05 21:50:24 +04:00
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* MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
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* M68000 Hi-Performance Microprocessor Division
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* M68040 Software Package
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*
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* M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
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* All rights reserved.
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*
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* THE SOFTWARE is provided on an "AS IS" basis and without warranty.
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* To the maximum extent permitted by applicable law,
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* MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
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* INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
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* PARTICULAR PURPOSE and any warranty against infringement with
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* regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
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* and any accompanying written materials.
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*
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* To the maximum extent permitted by applicable law,
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* IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
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* (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
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* PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
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* OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
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* SOFTWARE. Motorola assumes no responsibility for the maintenance
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* and support of the SOFTWARE.
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*
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* You are hereby granted a copyright license to use, modify, and
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* distribute the SOFTWARE so long as this entire notice is retained
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* without alteration in any modified and/or redistributed versions,
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* and that such modified versions are clearly identified as such.
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* No licenses are granted by implication, estoppel or otherwise
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* under any patents or trademarks of Motorola, Inc.
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*
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* x_fline.sa 3.3 1/10/91
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*
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* fpsp_fline --- FPSP handler for fline exception
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*
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* First determine if the exception is one of the unimplemented
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* floating point instructions. If so, let fpsp_unimp handle it.
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* Next, determine if the instruction is an fmovecr with a non-zero
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* <ea> field. If so, handle here and return. Otherwise, it
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* must be a real F-line exception.
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*
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X_FLINE IDNT 2,1 Motorola 040 Floating Point Software Package
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section 8
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include fpsp.h
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xref real_fline
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xref fpsp_unimp
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xref uni_2
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xref mem_read
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xref fpsp_fmt_error
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xdef fpsp_fline
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fpsp_fline:
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*
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* check for unimplemented vector first. Use EXC_VEC-4 because
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* the equate is valid only after a 'link a6' has pushed one more
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* long onto the stack.
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*
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cmp.w #UNIMP_VEC,EXC_VEC-4(a7)
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beq.l fpsp_unimp
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*
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* fmovecr with non-zero <ea> handling here
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*
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sub.l #4,a7 ;4 accounts for 2-word difference
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* ;between six word frame (unimp) and
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* ;four word frame
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link a6,#-LOCAL_SIZE
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fsave -(a7)
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movem.l d0-d1/a0-a1,USER_DA(a6)
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movea.l EXC_PC+4(a6),a0 ;get address of fline instruction
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lea.l L_SCR1(a6),a1 ;use L_SCR1 as scratch
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move.l #4,d0
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add.l #4,a6 ;to offset the sub.l #4,a7 above so that
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* ;a6 can point correctly to the stack frame
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* ;before branching to mem_read
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bsr.l mem_read
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sub.l #4,a6
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move.l L_SCR1(a6),d0 ;d0 contains the fline and command word
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bfextu d0{4:3},d1 ;extract coprocessor id
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cmpi.b #1,d1 ;check if cpid=1
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bne.w not_mvcr ;exit if not
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bfextu d0{16:6},d1
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cmpi.b #$17,d1 ;check if it is an FMOVECR encoding
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bne.w not_mvcr
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* ;if an FMOVECR instruction, fix stack
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* ;and go to FPSP_UNIMP
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fix_stack:
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cmpi.b #VER_40,(a7) ;test for orig unimp frame
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bne.b ck_rev
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sub.l #UNIMP_40_SIZE-4,a7 ;emulate an orig fsave
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move.b #VER_40,(a7)
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move.b #UNIMP_40_SIZE-4,1(a7)
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clr.w 2(a7)
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bra.b fix_con
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ck_rev:
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cmpi.b #VER_41,(a7) ;test for rev unimp frame
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bne.l fpsp_fmt_error ;if not $40 or $41, exit with error
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sub.l #UNIMP_41_SIZE-4,a7 ;emulate a rev fsave
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move.b #VER_41,(a7)
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move.b #UNIMP_41_SIZE-4,1(a7)
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clr.w 2(a7)
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fix_con:
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move.w EXC_SR+4(a6),EXC_SR(a6) ;move stacked sr to new position
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move.l EXC_PC+4(a6),EXC_PC(a6) ;move stacked pc to new position
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fmove.l EXC_PC(a6),FPIAR ;point FPIAR to fline inst
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move.l #4,d1
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add.l d1,EXC_PC(a6) ;increment stacked pc value to next inst
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move.w #$202c,EXC_VEC(a6) ;reformat vector to unimp
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clr.l EXC_EA(a6) ;clear the EXC_EA field
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move.w d0,CMDREG1B(a6) ;move the lower word into CMDREG1B
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clr.l E_BYTE(a6)
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bset.b #UFLAG,T_BYTE(a6)
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movem.l USER_DA(a6),d0-d1/a0-a1 ;restore data registers
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bra.l uni_2
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not_mvcr:
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movem.l USER_DA(a6),d0-d1/a0-a1 ;restore data registers
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frestore (a7)+
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unlk a6
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add.l #4,a7
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bra.l real_fline
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end
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