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NetBSD/sys/dev/pci/pucdata.c

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'Dolphin' -> 'Dolphin Peripherals' where appropriate
1999-07-03 09:55:23 +04:00
/* $NetBSD: pucdata.c,v 1.6 1999/07/03 05:55:23 cgd Exp $ */
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
/*
add code to cope with multiple ports per BAR, as are found, for instance, on the 8 port card Simon Gerraty has. In general, cards which have this lots of ports also have a separate interrupt status register, but this change is just to talk to the various ports independently. It works, but it's not optimal. (XXX still need a good name for the card in the comments, and to update the manual page.)
1999-02-06 09:29:54 +03:00
* Copyright (c) 1998, 1999 Christopher G. Demetriou. All rights reserved.
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Christopher G. Demetriou
* for the NetBSD Project.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
* PCI "universal" communications card driver configuration data (used to
* match/attach the cards).
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pucvar.h>
const struct puc_device_description puc_devices[] = {
/*
* XXX no entry because I have no data:
'Dolphin' -> 'Dolphin Peripherals' where appropriate
1999-07-03 09:55:23 +04:00
* XXX Dolphin Peripherals 4006 (single parallel)
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
*/
/*
'Dolphin' -> 'Dolphin Peripherals' where appropriate
1999-07-03 09:55:23 +04:00
* Dolphin Peripherals 4014 (dual parallel port) card. PLX 9050, with
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
* a seemingly-lame EEPROM setup that puts the Dolphin IDs
* into the subsystem fields, and claims that it's a
* network/misc (0x02/0x80) device.
*/
'Dolphin' -> 'Dolphin Peripherals' where appropriate
1999-07-03 09:55:23 +04:00
{ "Dolphin Peripherals 4014",
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
{ 0x10b5, 0x9050, 0xd84d, 0x6810 },
{ 0xffff, 0xffff, 0xffff, 0xffff },
{
add code to cope with multiple ports per BAR, as are found, for instance, on the 8 port card Simon Gerraty has. In general, cards which have this lots of ports also have a separate interrupt status register, but this change is just to talk to the various ports independently. It works, but it's not optimal. (XXX still need a good name for the card in the comments, and to update the manual page.)
1999-02-06 09:29:54 +03:00
{ PUC_PORT_TYPE_LPT, 0x20, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x24, 0x00 },
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
},
},
/*
* XXX no entry because I have no data:
'Dolphin' -> 'Dolphin Peripherals' where appropriate
1999-07-03 09:55:23 +04:00
* XXX Dolphin Peripherals 4025 (single serial)
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
*/
/*
'Dolphin' -> 'Dolphin Peripherals' where appropriate
1999-07-03 09:55:23 +04:00
* Dolphin Peripherals 4035 (dual serial port) card. PLX 9050, with
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
* a seemingly-lame EEPROM setup that puts the Dolphin IDs
* into the subsystem fields, and claims that it's a
* network/misc (0x02/0x80) device.
*/
'Dolphin' -> 'Dolphin Peripherals' where appropriate
1999-07-03 09:55:23 +04:00
{ "Dolphin Peripherals 4035",
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
{ 0x10b5, 0x9050, 0xd84d, 0x6808 },
{ 0xffff, 0xffff, 0xffff, 0xffff },
{
add code to cope with multiple ports per BAR, as are found, for instance, on the 8 port card Simon Gerraty has. In general, cards which have this lots of ports also have a separate interrupt status register, but this change is just to talk to the various ports independently. It works, but it's not optimal. (XXX still need a good name for the card in the comments, and to update the manual page.)
1999-02-06 09:29:54 +03:00
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
},
},
I went to Fry's and noticed a few more cards that probably will be supportable with this driver, but currently aren't supported. Add them.
1998-07-12 06:21:56 +04:00
/*
* XXX no entry because I have no data:
'Dolphin' -> 'Dolphin Peripherals' where appropriate
1999-07-03 09:55:23 +04:00
* XXX Dolphin Peripherals 4078 (dual serial and single parallel)
I went to Fry's and noticed a few more cards that probably will be supportable with this driver, but currently aren't supported. Add them.
1998-07-12 06:21:56 +04:00
*/
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
I went to Fry's and noticed a few more cards that probably will be supportable with this driver, but currently aren't supported. Add them.
1998-07-12 06:21:56 +04:00
/*
Add support for 36 more SIIG PCI serial/parallel cards (for a total of 37). This means that all SIIG PCI serial/parallel cards (described on their web site as "I/O boards" as of July 2, 1999) should now be supported.
1999-07-03 09:38:05 +04:00
* SIIG Boards.
*
* SIIG provides documentation for their boards at:
* <URL:http://www.siig.com/driver.htm>
*
* Please excuse the weird ordering, it's the order they
* use in their documentation.
I went to Fry's and noticed a few more cards that probably will be supportable with this driver, but currently aren't supported. Add them.
1998-07-12 06:21:56 +04:00
*/
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
/*
Add support for 36 more SIIG PCI serial/parallel cards (for a total of 37). This means that all SIIG PCI serial/parallel cards (described on their web site as "I/O boards" as of July 2, 1999) should now be supported.
1999-07-03 09:38:05 +04:00
* SIIG "10x" family boards.
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
*/
Add support for 36 more SIIG PCI serial/parallel cards (for a total of 37). This means that all SIIG PCI serial/parallel cards (described on their web site as "I/O boards" as of July 2, 1999) should now be supported.
1999-07-03 09:38:05 +04:00
/* SIIG Cyber Serial PCI 16C550 (10x family): 1S */
{ "SIIG Cyber Serial PCI 16C550 (10x family)",
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
{ 0x131f, 0x1000, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
add code to cope with multiple ports per BAR, as are found, for instance, on the 8 port card Simon Gerraty has. In general, cards which have this lots of ports also have a separate interrupt status register, but this change is just to talk to the various ports independently. It works, but it's not optimal. (XXX still need a good name for the card in the comments, and to update the manual page.)
1999-02-06 09:29:54 +03:00
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
},
},
Add support for 36 more SIIG PCI serial/parallel cards (for a total of 37). This means that all SIIG PCI serial/parallel cards (described on their web site as "I/O boards" as of July 2, 1999) should now be supported.
1999-07-03 09:38:05 +04:00
/* SIIG Cyber Serial PCI 16C650 (10x family): 1S */
{ "SIIG Cyber Serial PCI 16C650 (10x family)",
{ 0x131f, 0x1001, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
},
},
/* SIIG Cyber Serial PCI 16C850 (10x family): 1S */
{ "SIIG Cyber Serial PCI 16C850 (10x family)",
{ 0x131f, 0x1002, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
},
},
/* SIIG Cyber I/O PCI 16C550 (10x family): 1S, 1P */
{ "SIIG Cyber I/O PCI 16C550 (10x family)",
{ 0x131f, 0x1010, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x1c, 0x00 },
},
},
/* SIIG Cyber I/O PCI 16C650 (10x family): 1S, 1P */
{ "SIIG Cyber I/O PCI 16C650 (10x family)",
{ 0x131f, 0x1011, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x1c, 0x00 },
},
},
/* SIIG Cyber I/O PCI 16C850 (10x family): 1S, 1P */
{ "SIIG Cyber I/O PCI 16C850 (10x family)",
{ 0x131f, 0x1012, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x1c, 0x00 },
},
},
/* SIIG Cyber Parallel PCI (10x family): 1P */
{ "SIIG Cyber Parallel PCI (10x family)",
{ 0x131f, 0x1020, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_LPT, 0x18, 0x00 },
},
},
/* SIIG Cyber Parallel Dual PCI (10x family): 2P */
{ "SIIG Cyber Parallel Dual PCI (10x family)",
{ 0x131f, 0x1021, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_LPT, 0x18, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x20, 0x00 },
},
},
/* SIIG Cyber Serial Dual PCI 16C550 (10x family): 2S */
{ "SIIG Cyber Serial Dual PCI 16C550 (10x family)",
{ 0x131f, 0x1030, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
},
},
/* SIIG Cyber Serial Dual PCI 16C650 (10x family): 2S */
{ "SIIG Cyber Serial Dual PCI 16C650 (10x family)",
{ 0x131f, 0x1031, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
},
},
/* SIIG Cyber Serial Dual PCI 16C850 (10x family): 2S */
{ "SIIG Cyber Serial Dual PCI 16C850 (10x family)",
{ 0x131f, 0x1032, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
},
},
/* SIIG Cyber 2S1P PCI 16C550 (10x family): 2S, 1P */
{ "SIIG Cyber 2S1P PCI 16C550 (10x family)",
{ 0x131f, 0x1034, 0, 0 }, /* XXX really? */
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x20, 0x00 },
},
},
/* SIIG Cyber 2S1P PCI 16C650 (10x family): 2S, 1P */
{ "SIIG Cyber 2S1P PCI 16C650 (10x family)",
{ 0x131f, 0x1035, 0, 0 }, /* XXX really? */
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x20, 0x00 },
},
},
/* SIIG Cyber 2S1P PCI 16C850 (10x family): 2S, 1P */
{ "SIIG Cyber 2S1P PCI 16C850 (10x family)",
{ 0x131f, 0x1036, 0, 0 }, /* XXX really? */
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x20, 0x00 },
},
},
/* SIIG Cyber 4S PCI 16C550 (10x family): 4S */
{ "SIIG Cyber 4S PCI 16C550 (10x family)",
{ 0x131f, 0x1050, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
{ PUC_PORT_TYPE_COM, 0x20, 0x00 },
{ PUC_PORT_TYPE_COM, 0x24, 0x00 },
},
},
/* SIIG Cyber 4S PCI 16C650 (10x family): 4S */
{ "SIIG Cyber 4S PCI 16C650 (10x family)",
{ 0x131f, 0x1051, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
{ PUC_PORT_TYPE_COM, 0x20, 0x00 },
{ PUC_PORT_TYPE_COM, 0x24, 0x00 },
},
},
/* SIIG Cyber 4S PCI 16C850 (10x family): 4S */
{ "SIIG Cyber 4S PCI 16C850 (10x family)",
{ 0x131f, 0x1052, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
{ PUC_PORT_TYPE_COM, 0x20, 0x00 },
{ PUC_PORT_TYPE_COM, 0x24, 0x00 },
},
},
I went to Fry's and noticed a few more cards that probably will be supportable with this driver, but currently aren't supported. Add them.
1998-07-12 06:21:56 +04:00
/*
Add support for 36 more SIIG PCI serial/parallel cards (for a total of 37). This means that all SIIG PCI serial/parallel cards (described on their web site as "I/O boards" as of July 2, 1999) should now be supported.
1999-07-03 09:38:05 +04:00
* SIIG "20x" family boards.
I went to Fry's and noticed a few more cards that probably will be supportable with this driver, but currently aren't supported. Add them.
1998-07-12 06:21:56 +04:00
*/
Add support for 36 more SIIG PCI serial/parallel cards (for a total of 37). This means that all SIIG PCI serial/parallel cards (described on their web site as "I/O boards" as of July 2, 1999) should now be supported.
1999-07-03 09:38:05 +04:00
/* SIIG Cyber Parallel PCI (20x family): 1P */
{ "SIIG Cyber Parallel PCI (20x family)",
{ 0x131f, 0x2020, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_LPT, 0x10, 0x00 },
},
},
/* SIIG Cyber Parallel Dual PCI (20x family): 2P */
{ "SIIG Cyber Parallel Dual PCI (20x family)",
{ 0x131f, 0x2021, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_LPT, 0x10, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x18, 0x00 },
},
},
/* SIIG Cyber 2P1S PCI 16C550 (20x family): 1S, 2P */
{ "SIIG Cyber 2P1S PCI 16C550 (20x family)",
{ 0x131f, 0x2040, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x14, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x1c, 0x00 },
},
},
/* SIIG Cyber 2P1S PCI 16C650 (20x family): 1S, 2P */
{ "SIIG Cyber 2P1S PCI 16C650 (20x family)",
{ 0x131f, 0x2041, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x14, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x1c, 0x00 },
},
},
/* SIIG Cyber 2P1S PCI 16C850 (20x family): 1S, 2P */
{ "SIIG Cyber 2P1S PCI 16C850 (20x family)",
{ 0x131f, 0x2042, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x14, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x1c, 0x00 },
},
},
/* SIIG Cyber Serial PCI 16C550 (20x family): 1S */
{ "SIIG Cyber Serial PCI 16C550 (20x family)",
{ 0x131f, 0x2000, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
},
},
/* SIIG Cyber Serial PCI 16C650 (20x family): 1S */
{ "SIIG Cyber Serial PCI 16C650 (20x family)",
{ 0x131f, 0x2001, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
},
},
/* SIIG Cyber Serial PCI 16C850 (20x family): 1S */
{ "SIIG Cyber Serial PCI 16C850 (20x family)",
{ 0x131f, 0x2002, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
},
},
/* SIIG Cyber I/O PCI 16C550 (20x family): 1S, 1P */
{ "SIIG Cyber I/O PCI 16C550 (20x family)",
{ 0x131f, 0x2010, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x14, 0x00 },
},
},
/* SIIG Cyber I/O PCI 16C650 (20x family): 1S, 1P */
{ "SIIG Cyber I/O PCI 16C650 (20x family)",
{ 0x131f, 0x2011, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x14, 0x00 },
},
},
/* SIIG Cyber I/O PCI 16C850 (20x family): 1S, 1P */
{ "SIIG Cyber I/O PCI 16C850 (20x family)",
{ 0x131f, 0x2012, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x14, 0x00 },
},
},
/* SIIG Cyber Serial Dual PCI 16C550 (20x family): 2S */
{ "SIIG Cyber Serial Dual PCI 16C550 (20x family)",
{ 0x131f, 0x2030, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
},
},
/* SIIG Cyber Serial Dual PCI 16C650 (20x family): 2S */
{ "SIIG Cyber Serial Dual PCI 16C650 (20x family)",
{ 0x131f, 0x2031, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
},
},
/* SIIG Cyber Serial Dual PCI 16C850 (20x family): 2S */
{ "SIIG Cyber Serial Dual PCI 16C850 (20x family)",
{ 0x131f, 0x2032, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
},
},
/* SIIG Cyber 2S1P PCI 16C550 (20x family): 2S, 1P */
{ "SIIG Cyber 2S1P PCI 16C550 (20x family)",
{ 0x131f, 0x2060, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x18, 0x00 },
},
},
/* SIIG Cyber 2S1P PCI 16C650 (20x family): 2S, 1P */
{ "SIIG Cyber 2S1P PCI 16C650 (20x family)",
{ 0x131f, 0x2061, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x18, 0x00 },
},
},
/* SIIG Cyber 2S1P PCI 16C850 (20x family): 2S, 1P */
{ "SIIG Cyber 2S1P PCI 16C850 (20x family)",
{ 0x131f, 0x2062, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
{ PUC_PORT_TYPE_LPT, 0x18, 0x00 },
},
},
/* SIIG Cyber 4S PCI 16C550 (20x family): 4S */
{ "SIIG Cyber 4S PCI 16C550 (20x family)",
{ 0x131f, 0x2050, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
},
},
/* SIIG Cyber 4S PCI 16C650 (20x family): 4S */
{ "SIIG Cyber 4S PCI 16C650 (20x family)",
{ 0x131f, 0x2051, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
},
},
/* SIIG Cyber 4S PCI 16C850 (20x family): 4S */
{ "SIIG Cyber 4S PCI 16C850 (20x family)",
{ 0x131f, 0x2052, 0, 0 },
{ 0xffff, 0xffff, 0, 0 },
{
{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
},
},
add code to cope with multiple ports per BAR, as are found, for instance, on the 8 port card Simon Gerraty has. In general, cards which have this lots of ports also have a separate interrupt status register, but this change is just to talk to the various ports independently. It works, but it's not optimal. (XXX still need a good name for the card in the comments, and to update the manual page.)
1999-02-06 09:29:54 +03:00
/*
put in better name/description for Simon G's board
1999-02-06 09:55:15 +03:00
* VScom PCI-800, as sold on http://www.swann.com.au/isp/titan.html.
* Some PLX chip. Note: This board has a software selectable(?)
* clock multiplier which this driver doesn't support, so you'll
* have to use an appropriately scaled baud rate when talking to
* the card.
add code to cope with multiple ports per BAR, as are found, for instance, on the 8 port card Simon Gerraty has. In general, cards which have this lots of ports also have a separate interrupt status register, but this change is just to talk to the various ports independently. It works, but it's not optimal. (XXX still need a good name for the card in the comments, and to update the manual page.)
1999-02-06 09:29:54 +03:00
*/
put in better name/description for Simon G's board
1999-02-06 09:55:15 +03:00
{ "VScom PCI-800",
add code to cope with multiple ports per BAR, as are found, for instance, on the 8 port card Simon Gerraty has. In general, cards which have this lots of ports also have a separate interrupt status register, but this change is just to talk to the various ports independently. It works, but it's not optimal. (XXX still need a good name for the card in the comments, and to update the manual page.)
1999-02-06 09:29:54 +03:00
{ 0x10b5, 0x1076, 0x10b5, 0x1076 },
{ 0xffff, 0xffff, 0xffff, 0xffff },
{
{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
{ PUC_PORT_TYPE_COM, 0x18, 0x08 },
{ PUC_PORT_TYPE_COM, 0x18, 0x10 },
{ PUC_PORT_TYPE_COM, 0x18, 0x18 },
{ PUC_PORT_TYPE_COM, 0x18, 0x20 },
{ PUC_PORT_TYPE_COM, 0x18, 0x28 },
{ PUC_PORT_TYPE_COM, 0x18, 0x30 },
{ PUC_PORT_TYPE_COM, 0x18, 0x38 },
},
},
add a driver for "PCI 'universal' communications" cards, that is, PCI cards which contain 'standard' com- and lpt-type ports. Some of these present as PCI simple-communications/serial or simple-communications/parallel devices, but many do not. (Additionally, there is no document that I can find that describes the "specific well-konwn register-level" description of how the 'standard' devices' config space headers shold work.) Eventually, some of the devices driven by this code should become simple pci attachments for the 'lpt' and 'com' drivers, but that requires solid documentation.
1998-06-26 22:52:41 +04:00
{ 0 }
};