1999-12-16 01:07:30 +03:00
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.\" $NetBSD: tlp.4,v 1.4 1999/12/15 22:07:34 abs Exp $
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1999-11-05 22:48:49 +03:00
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.\"
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.\" Copyright (c) 1999 The NetBSD Foundation, Inc.
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.\" All rights reserved.
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.\"
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.\" This code is derived from software contributed to The NetBSD Foundation
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.\" by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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.\" NASA Ames Research Center.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\" 3. All advertising materials mentioning features or use of this software
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.\" must display the following acknowledgement:
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.\" This product includes software developed by the NetBSD
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.\" Foundation, Inc. and its contributors.
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.\" 4. Neither the name of The NetBSD Foundation nor the names of its
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.\" contributors may be used to endorse or promote products derived
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.\" from this software without specific prior written permission.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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.\" ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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.\" TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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.\" PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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.\" BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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.\" POSSIBILITY OF SUCH DAMAGE.
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.\"
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.Dd November 4, 1999
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.Dt TLP 4
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.Os
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.Sh NAME
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.Nm tlp
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1999-12-16 01:07:30 +03:00
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.Nd DECchip 21x4x and clone Ethernet interfaces device driver
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1999-11-05 22:48:49 +03:00
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.Sh SYNOPSIS
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.Cd "tlp* at eisa? slot ?"
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.Cd "tlp* at pci? dev ? function ?"
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.Cd "tlp* at cardbus?"
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.Pp
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.Cd "options TLP_MATCH_21040"
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.Cd "options TLP_MATCH_21041"
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.Cd "options TLP_MATCH_21140"
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.Cd "options TLP_MATCH_21142"
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.Pp
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Configuration of PHYs may also be necessary. See
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.Xr mii 4 .
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.Sh DESCRIPTION
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The
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.Nm
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device driver supports Ethernet interfaces based on the DECchip 21x4x
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.Dq Tulip
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1999-12-12 08:57:50 +03:00
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(DEC fourth generation Ethernet controller) and a variety of clone chips.
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1999-11-05 22:48:49 +03:00
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The Tulip has several features designed to make it flexible and reduce
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CPU usage:
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.Bl -bullet -offset indent
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.It
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Flexible receive filter allowing for 16 perfect matches, 16 perfect
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inverse matches, 512-bit hash table plus 1 perfect match, or
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512-bit hash table only.
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.It
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Uniform transmit descriptor architecture, configurable as a ring (allowing
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2 buffers per descriptor) or a chain (allowing 1 buffer per descriptor).
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.It
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Uniform receive descriptor architecture, configurable as a ring (allowing
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2 buffers per descriptor) or a chain (allowing 1 buffer per descriptor).
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.It
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Interrupt pacing; host may chose whether or not completion of processing of
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an individual descriptor causes an interrupt.
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.It
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Support for jumbo packets (by disabling transmit and receive watchdog
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timers).
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.It
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A patented transmit backoff algorithm which solves the Ethernet capture
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effect problem.
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.It
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Flexible bus modes to optimize DMA cycles for various cache sizes and
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bus implementations.
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.It
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Programmable transmit FIFO drain threshold to allow DMA overlap and reduce
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time to transmit.
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.It
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Flexible media attachment facilities.
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.El
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.Pp
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The
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.Nm
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driver supports the following chips:
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.Bl -bullet -offset indent
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.It
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.Em DECchip 21040
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-- This is the original Tulip Ethernet chip. It supports 10Mb/s speeds
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over a built-in serial interface. The serial interface has support for
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10baseT and AUI media. The AUI port may be connected to 10base5 AUI
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or 10base2 BNC connectors, or both, selected by a gang jumper on the
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board. Some boards connect the BNC connector to an external serial
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interface. The driver has no way of knowing this, but the external
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serial interface may be selected with the
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.Dq manual
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media setting.
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.Pp
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Boards that include this chip include the DEC DE-435, on-board Ethernet on
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many DEC AlphaStation and AlphaServer systems, ZNYX ZX312, ZX312T,
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ZX314, ZX315, SMC 8432, SMC 8434, ACCTON EN1203, and some Cogent
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multi-port boards.
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.Pp
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This chip also appears on the DEC DE-425 EISA Ethernet board. This board
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is a DECchip 21040 and a PLX PCI glue chip, which provides the interface
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to the EISA bus, and special address decoding so that the PCI configuration
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space registers of the 21040 are accessible in normal EISA I/O space.
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.Pp
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The very first versions of this chip were labeled
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.Dq DC1003
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and
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.Dq DC1003 Prototype .
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.It
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.Em DECchip 21041
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-- This is the second chip in the Tulip family, dubbed
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.Dq Tulip Plus .
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It supports 10Mb/s speeds over a built-in serial interface. The serial
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interface has support for 10baseT, 10base5 AUI, and 10base2 BNC media.
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The serial interface also includes support for IEEE 802.3u NWay over
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the 10baseT interface, for negotiation of duplex mode with the link
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partner.
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.Pp
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Boards that include this chip include the DEC DE-450 and some SMC boards.
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.It
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.Em DECchip 21140 and 21140A
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-- This is the third chip in the Tulip family, dubbed
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.Dq FasterNet .
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It supports 10Mb/s speeds with a built-in 10baseT encoder/decoder,
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and 100Mb/s speeds with a built-in 100base PCS function. Support
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for 100baseTX and 100baseT4 is provided by a built-in scrambler.
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Support for 100baseFX is possible with an appropriate PMD connected
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to the 100base PCS. The 21140 and 21140A also support 10Mb/s and
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100Mb/s speeds over an MII interface connected to one or more PHYs.
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.Pp
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The 21140 and 21140A include a general purpose I/O facility, which
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may be used to toggle relays on the board. This facility is often
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used to reset individual board modules (e.g. the MII bus), select
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the output path of the chip (e.g. connect the UTP port on the board
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to the PHY, built-in 10baseT ENDEC, or built-in 100baseT PMD), or
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detect link status (by reading an output pin on the 100baseT magnetics).
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.Pp
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The 21140 and 21140A use a standardized data structure located in
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the SROM to describe how the chip should be programmed for various
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media settings, including the internal chip pathway, and GPIO settings.
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If the SROM data is not in the standardized format, the device driver
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must know specific programming information for that particular board.
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.Pp
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Boards that include the 21140 and 21140A include the DEC EB140, DE-500XA,
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DE-500AA, Asante EtherFast, DaynaPORT BlueStreak, Cogent EM100TX, EM110TX,
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EM440T4 multi-port, Kingston KNE100TX, older verions of the NetGear FA-310TX,
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SMC 9332, SMC 9334, ZNYX ZX34x multi-port, and Adaptec ANA-6944A/TX multi-port.
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.It
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.Em DECchip 21142 and 21143
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-- These are the fourth and fifth chips in the Tulip family. While
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they have two different chip numbers, the 21142 and 21143 are essentially
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identical, with only minor differences related to available technology
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at time of manufacture. Both chips include support for 10Mb/s speeds
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over a built-in serial interface, and support for 10Mb/s and 100Mb/s
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speeds over an MII interface connected to one or more PHYs. The
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serial interface includes support for 10baseT, 10base5 AUI, and
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10base2 BNC media, as well as support for IEEE 802.3u NWay over
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the 10baseT interface, for negotiation of duplex mode and link
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speed with the link partner.
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.Pp
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The 21143 adds support for 100Mb/s speeds with a built-in
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PCS function. Support for 100baseTX and 100baseT4 is provided by
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a built-in scrambler. Support for 100baseFX is possible with an
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appropriate PMD connected to the 100base PCS.
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.Pp
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The 21142 and 21143 include a general purpose I/O facility, which
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may be used to toggle relays on the board. This facility is often
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used to reset individual board modules (e.g. the MII bus), select
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the output path of the chip (e.g. connect the UTP port on the board
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to the PHY, built-in serial interface, or built-in 100baseT PMD), or
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detect link status (by reading an output pin on the 100baseT magnetics).
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.Pp
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The 21142 and 21143 use a standardized data structure located in
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the SROM to describe how the chip should be programmed for various
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media settings, including the internal chip pathway, and GPIO settings.
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If the SROM data is not in the standardized format, the device driver
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must know specific programming information for that particular board.
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.Pp
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Boards that include the 21142 include the DEC EB142, and on-board Ethernet
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on the Digital Personal Workstation (Alpha
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.Dq Miata
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and x86 models) and several Digital PCs.
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.Pp
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Boards that include the 21143 include the DEC EB143, DE-500BA, several
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commonly-available 100baseFX boards, and the NetGear FA-510c CardBus
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card.
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.It
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.Em Lite-On 82C168 and 82C169
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-- These chips, dubbed
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.Dq PNIC ,
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were some of the first commonly-available Tulip clones,
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appearing on low-cost boards when it became difficult for board
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vendors to obtain DECchip 21140A parts. They include support for
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10Mb/s speeds over a built-in 10baseT encoder/decoder, and 100Mb/s
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speeds over a built-in PCS function. Support for 100baseTX and
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100baseT4 is provided by a built-in scrambler and transciever
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module. The transciever module also includes support for NWay,
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for negotiating duplex mode and link speed with the link partner.
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These chips also include support for 10Mb/s and 100Mb/s speeds over
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and MII interface connected to one or more PHYs.
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.Pp
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These chips also include a GPIO facility, although it is programmed
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differently than the 21140's.
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.Pp
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Unfortunately, these chips seem to be plagued by two unfortunate
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hardware bugs: in some situations, the receive logic incorrectly
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dumps the entire transmit FIFO into the receive chain, rather
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than a single Ethernet frame, and the DMA engines appear to be
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substandard; they must be run in store-and-forward mode, and
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occasionally fail to upload the filter setup frame.
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.Pp
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1999-11-05 22:55:07 +03:00
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Boards that include the 82C168 and 82C169 include the newer NetGear
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1999-11-05 22:48:49 +03:00
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FA-310TX, the Kingston KNE110TX, and some older LinkSys LNE100TX boards.
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.It
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.Em Macronix 98713, 98713A, 98715, 98715A, and 98725
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-- Of all the clones, these chips, dubbed
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.Dq PMAC ,
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are the best. They are very close clones of their respective
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originals, with the exception of some slight programming magic
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necessary to work around an apparent hardware bug.
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.Pp
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The 98713 is a DECchip 21140A clone. It includes all of the 21140A's
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features, and uses the same SROM data format.
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.Pp
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The 98713A is a half-clone of the DECchip 21143. It has support for
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serial, PCS, and MII media. The serial interface has a built-in
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NWay function. However, the 98713A does not have a GPIO facility, and,
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as a result, usually does not use the same SROM format as the 21143 (no
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need for GPIO programming information).
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.Pp
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The 98715, 98715A, and 98725 are more 21143-like, but lack the GPIO
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facility and MII. These chips also support ACPI power management.
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.Pp
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Boards that include the Macronix chips include some SVEC boards,
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some SOHOWare boards, and the Compex RL100TX.
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.It
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.Em Lite-On/Macronix 82C115
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-- This chip, dubbed the
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.Dq PNIC-II ,
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was co-designed by Lite-On and Macronix. It is almost identical to
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the Macronix 98725, with a few exceptions: it has Wake-On-LAN support,
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uses a 128-bit receive filter hash table, and supports IEEE 802.3x
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flow control.
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.Pp
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Boards that include the 82C115 include the newer LinkSys (Version 2)
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LNE100TX boards.
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.It
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.Em Winbond 89C840F
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-- This chip is a very low-end barely-a-clone of the 21140. It supports
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10Mb/s and 100Mb/s speeds over an MII interface only, and has several
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programming differences from the 21140.
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.Pp
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The receive filter is completely different: it supports only a single
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perfect match, and has only a 64-bit multicast filter hash table. The
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receive filter is programmed using special registers rather than the
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standard Tulip setup frame.
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.Pp
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This chip is also plagued by a terrible DMA engine. The chip must be
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run in store-and-forward mode or it will often transmit garbage onto
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the wire.
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.Pp
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Interrupt pacing is also less flexible on the chip.
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.Pp
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Boards that include the 89C940F include the Complex RL100ATX,
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some Unicom 10/100 boards, and several no-name 10/100 boards.
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.It
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.Em ADMtek AL981
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-- This chip is a low cost, single-chip (sans magnetics) 10/100 Ethernet
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implementation. It supports 10Mb/s and 100Mb/s speeds over an internal
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PHY. There is no generic MII bus; instead the IEEE 802.3u-compliant PHY
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is accessed via special registers on the chip. This chip also supports
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Wake-On-LAN and IEEE 802.3x flow control.
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.Pp
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The receive filter on the AL981 is completely different: it supports only
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a single perfect match, and has only a 64-bit multicast filter hash table.
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The receive filter is programmed using special registers rather than the
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standard Tulip setup frame.
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.Pp
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This chip also supports ACPI power management.
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.Pp
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A list of boards which include the AL981 is not yet available.
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.Pp
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Support for the AL981 has not yet been tested. If you have a board
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which uses this chip, please contact the author (listed below).
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.El
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|
|
|
.Sh MEDIA SELECTION
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|
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|
Media selection done using
|
|
|
|
.Xr ifconfig 8
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|
using the standard
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.Xr ifmedia 4
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|
mechanism. Refer to those manual pages for more information.
|
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.\" .Sh DIAGNOSTICS
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.\" XXX too be done.
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.Sh SEE ALSO
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|
|
|
.Xr arp 4 ,
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|
|
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.Xr eisa 4 ,
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|
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.Xr ifmedia 4 ,
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|
|
|
.Xr mii 4 ,
|
|
|
|
.Xr netintro 4 ,
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|
.Xr pci 4 ,
|
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.Xr ifconfig 8
|
|
|
|
.Rs
|
|
|
|
.%T "DECchip 21040 Ethernet LAN Controller for PCI Hardware Reference Manual"
|
|
|
|
.%D May 1994
|
|
|
|
.%A Digital Equipment Corporation
|
|
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|
.%O Order Number EC-N0752-72
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|
|
|
.Re
|
|
|
|
.Rs
|
|
|
|
.%T "DECchip 21041 PCI Ethernet LAN Controller Hardware Reference Manual"
|
|
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|
.%N Preliminary
|
|
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.%D April 1995
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.%A Digital Equipment Corporation
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.%O Order Number EC-QAWXA-TE
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.Re
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.Rs
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.%T "DECchip 21041 DC1017-BA Errata"
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.%N Revision 1.0
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.%D April 27, 1995
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.%A Digital Equipment Corporation
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.%O Order Number EC-QD2MA-TE
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.Re
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.Rs
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.%T "DECchip 21140 PCI Fast Ethernet LAN Controller Hardware Reference Manual"
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.%N Supercedes EC-Q0CA-TE
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.%D May 1995
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.%A Digital Equipment Corporation
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.%O Order Number EC-Q0CB-TE
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.Re
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.Rs
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.%T "DECchip 21140A PCI Fast Ethernet LAN Controller Hardware Reference Manual"
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.%N Supercedes EC-QN7NA-TE, EC-QN7NB-TE
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.%D January 1996
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.%A Digital Equipment Corporation
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.%O Order Number EC-QN7NC-TE
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.Re
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.Rs
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.%T "21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller Hardware Reference Manual"
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.%N Revision 1.0
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.%D October 1998
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.%A Intel Corporation
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.%O Document Number 278074-001
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.Re
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.Rs
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.%T "Ethernet Address ROM Programming: An Application Note"
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.%D April 1994
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.%A Digital Equipment Corporation
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.%O Order Number EC-N3214-72
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.Re
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.Rs
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.%T "Using the DECchip 21041 with Boot ROM, Serial ROM, and External Register: An Application Note"
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.%D April 1995
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.%A Digital Equipment Corporation
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.%O Order Number EC-QJLGA-TE
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.Re
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.Rs
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.%T "Connecting the DECchip 21140 PCI Fast Ethernet LAN Controller to the Network: An Application Note"
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.%N Preliminary
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.%D December 1994
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.%A Digital Equipment Corporation
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.%O Order Number EC-QAR2A-TE
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.Re
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.Rs
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.%T "MXIC MX98713 PMAC 100/10BASE PCI MAC Controller"
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.%N Revision 1.1
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.%D November 8, 1996
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.%A Macronix International Co., Ltd.
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.%O Part Number: PM0386
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.Re
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.Rs
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.%T "MXIC MX98713A Fast Ethernet MAC Controller"
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.%N Revision 1.0
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.%D August 28, 1997
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.%A Macronix International Co., Ltd.
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.%O Part Number: PM0489
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.Re
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.Rs
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.%T "MXIC MX98715A Single Chip Fast Ethernet NIC Controller"
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.%N Revision 1.2
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.%D February 24, 1999
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.%A Macronix International Co., Ltd.
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.%O Part Number: PM0537
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.Re
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.Rs
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.%T "MXIC MX98725 Single Chip Fast Ethernet NIC Controller"
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.%N Revision 1.7
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.%D September 15, 1998
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.%A Macronix International Co., Ltd.
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.%O Part Number: PM0468
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.Re
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.Rs
|
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.%T "MXIC MX98715 Application Note"
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.%N Revision 1.5
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.%D October 9, 1998
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.%A Macronix International Co., Ltd.
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.%O Part Number: PM0498
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.Re
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.Rs
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.%T "MXIC MX98715A Application Note"
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.%N Revision 1.2
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.%D October 9, 1998
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.%A Macronix International Co., Ltd.
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.%O Part Number: PM0541
|
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.Re
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.Rs
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.%T "MXIC MX98725 Application Note"
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.%N Revision 1.1
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.%D July 10, 1998
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.%A Macronix Internation Co., Ltd.
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.%O Part Number: PM0525
|
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.Re
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.Rs
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.%T "MXIC LC82C115 Single Chip Fast Ethernet NIC Controller"
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.%N Revision 0.2
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.%D February 12, 1999
|
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.%A Macronix International Co., Ltd.
|
|
|
|
.%O Part Number: PM0572
|
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.Re
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.Rs
|
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.%T "PNIC Hardware Specification"
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.%N Revision 1.0
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.%D December 1, 1994
|
|
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|
.%A LITE ON, Inc.
|
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.Re
|
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|
.Rs
|
|
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.%T "Comet: AL981 PCI 10/100 Fast Ethernet Controller with Integrated PHY"
|
|
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.%N Revision 0.93
|
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|
.%D January, 1999
|
|
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|
.%A ADMtek Incorporated
|
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.Re
|
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|
.Rs
|
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.%T "Winbond LAN W89C840F 100/10Mbps Ethernet Controller"
|
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.%N Revision A1
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|
.%D April 1997
|
|
|
|
.%A Winbond Electronics Corporation
|
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.Re
|
|
|
|
.Sh HISTORY
|
|
|
|
The
|
|
|
|
.Nm
|
|
|
|
driver first appeared in
|
|
|
|
.Nx 1.5 .
|
|
|
|
.Sh BUGS
|
|
|
|
The
|
|
|
|
.Nm
|
|
|
|
driver does not match the DECchip 21040, 21041, 21140, 21142, and 21143
|
|
|
|
chips on the PCI bus by default. That is because another driver,
|
|
|
|
.Nm de ,
|
|
|
|
which is more functional in some circumstances, exists for them. In
|
|
|
|
order for support for these chips to be activated in
|
|
|
|
.Nm tlp ,
|
|
|
|
either
|
|
|
|
.Nm de
|
|
|
|
must be left out of the kernel, or the appropriate
|
|
|
|
.Pa TLP_MATCH_*
|
|
|
|
options must be used.
|
|
|
|
.Pp
|
|
|
|
Media autosense is not yet supported for any serial or PCS function media.
|
|
|
|
It is, however, supported for IEEE 802.3u-compliant PHY media.
|
|
|
|
.Sh AUTHOR
|
|
|
|
The
|
|
|
|
.Nm
|
|
|
|
driver was written by
|
|
|
|
.An Jason R. Thorpe Aq thorpej@nas.nasa.gov
|
|
|
|
of the Numerical Aerospace Simulation Facility, NASA Ames Research Center.
|