2024-05-29 19:55:33 +03:00
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/*
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2024-05-29 20:11:25 +03:00
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* ______ ____ ______ _____ ______
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2024-05-29 19:55:33 +03:00
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* | ____| | _ \| ____| / / _ \| ____|
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2024-05-29 20:11:25 +03:00
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* | |__ _ __ ___ ___| |_) | |__ / / |_| | |__
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2024-05-29 19:55:33 +03:00
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* | __| '__/ _ \/ _ \ _ <| __| / /| _ | __|
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* | | | | | __/ __/ |_) | |____ / / | | | | |
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* |_| |_| \___|\___|____/|______/_/ |_| |_|_|
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*
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*
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* Tseng driver (based on the Allegro Tseng code).
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*
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* By Shawn Hargreaves, Marco Campinoti, and Ben Chauveau.
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*
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* See freebe.txt for copyright information.
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*/
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// #define NO_HWPTR
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#include <pc.h>
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#include "vbeaf.h"
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/* chipset information */
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2024-05-29 20:11:25 +03:00
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#define ET_NONE 0
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#define ET_3000 1
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#define ET_4000 2
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#define ET_6000 3
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2024-05-29 19:55:33 +03:00
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int tseng_type = ET_NONE;
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/* driver function prototypes */
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2024-05-29 20:11:25 +03:00
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void ET3000SetBank32( );
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void ET3000SetBank32End( );
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2024-05-29 19:55:33 +03:00
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void ET3000SetBank(AF_DRIVER *af, long bank);
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2024-05-29 20:11:25 +03:00
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void ET4000SetBank32( );
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void ET4000SetBank32End( );
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2024-05-29 19:55:33 +03:00
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void ET4000SetBank(AF_DRIVER *af, long bank);
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2024-05-29 20:11:25 +03:00
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int ExtStub( );
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2024-05-29 19:55:33 +03:00
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long GetVideoModeInfo(AF_DRIVER *af, short mode, AF_MODE_INFO *modeInfo);
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2024-05-29 20:11:25 +03:00
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long SetVideoMode(AF_DRIVER *af, short mode, long virtualX, long virtualY,
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long *bytesPerLine, int numBuffers, AF_CRTCInfo *crtc);
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2024-05-29 19:55:33 +03:00
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void RestoreTextMode(AF_DRIVER *af);
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long GetClosestPixelClock(AF_DRIVER *af, short mode, unsigned long pixelClock);
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void SaveRestoreState(AF_DRIVER *af, int subfunc, void *saveBuf);
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void SetDisplayStart(AF_DRIVER *af, long x, long y, long waitVRT);
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void SetActiveBuffer(AF_DRIVER *af, long index);
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void SetVisibleBuffer(AF_DRIVER *af, long index, long waitVRT);
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2024-05-29 20:11:25 +03:00
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int GetDisplayStartStatus(AF_DRIVER *af);
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void SetPaletteData(AF_DRIVER *af, AF_PALETTE *pal, long num, long index,
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long waitVRT);
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2024-05-29 19:55:33 +03:00
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/* list which ports we are going to access (only needed under Linux) */
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unsigned short ports_table[] = { 0xFFFF };
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/* internal driver state variables */
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int af_bpp;
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int af_width;
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int af_height;
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int af_visible_page;
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int af_active_page;
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int af_scroll_x;
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int af_scroll_y;
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int af_bank;
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/* FreeBE/AF extension allowing farptr access to video memory */
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FAF_HWPTR_DATA hwptr;
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/* list of available video modes */
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2024-05-29 20:11:25 +03:00
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typedef struct VIDEO_MODE {
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int w, h;
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int bpp;
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int num;
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int bios;
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2024-05-29 19:55:33 +03:00
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} VIDEO_MODE;
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2024-05-29 20:11:25 +03:00
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VIDEO_MODE et3000_mode_list[] = { { 640, 350, 8, 0x2D, 0 },
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{ 640, 480, 8, 0x2E, 0 },
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{ 800, 600, 8, 0x30, 0 } };
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VIDEO_MODE et4000_mode_list[] = {
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{ 640, 350, 8, 0x2D, 0 }, { 640, 480, 8, 0x2E, 0 },
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{ 640, 400, 8, 0x2F, 0 }, { 800, 600, 8, 0x30, 0 },
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{ 1024, 768, 8, 0x38, 0 }, { 320, 200, 15, 0x13, 0x10F0 },
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{ 640, 350, 15, 0x2D, 0x10F0 }, { 640, 480, 15, 0x2E, 0x10F0 },
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{ 640, 400, 15, 0x2F, 0x10F0 }, { 800, 600, 15, 0x30, 0x10F0 },
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{ 1024, 768, 15, 0x38, 0x10F0 }, { 640, 350, 24, 0x2DFF, 0x10F0 },
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{ 640, 480, 24, 0x2EFF, 0x10F0 }, { 640, 400, 24, 0x2FFF, 0x10F0 },
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{ 800, 600, 24, 0x30FF, 0x10F0 }
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2024-05-29 19:55:33 +03:00
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};
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2024-05-29 20:11:25 +03:00
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#define NUM_ET3000_MODES (int)(sizeof(et3000_mode_list) / sizeof(VIDEO_MODE))
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#define NUM_ET4000_MODES (int)(sizeof(et4000_mode_list) / sizeof(VIDEO_MODE))
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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short available_et3000_modes[NUM_ET3000_MODES + 1] = { 1, 2, 3, -1 };
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short available_et4000_modes[NUM_ET4000_MODES + 1] = { 1, 2, 3, 4, 5, 6,
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7, 8, 9, 10, 11, 12,
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13, 14, 15, -1 };
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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/* detect:
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* Detects the presence of a Tseng card.
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*/
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int detect( ) {
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int old1, old2, subver;
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old1 = inportb(0x3BF);
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old2 = inportb(0x3D4 + 4);
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outportb(0x3BF, 3);
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outportb(0x3D4 + 4, 0xA0);
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if (test_register(0x3CD, 0x3F)) {
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if (test_vga_register(0x3D4, 0x33, 0x0F)) {
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if (test_register(0x3CB, 0x33)) {
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subver = read_vga_register(0x217A, 0xEC) >> 4;
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if (subver <= 11)
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return ET_4000;
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else if (subver == 15)
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return ET_6000;
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/* else unknown Tseng */
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} else
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return ET_4000;
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} else
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return ET_3000;
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}
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outportb(0x3BF, old1);
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outportb(0x3D4 + 4, old2);
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return ET_NONE;
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}
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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/* SetupDriver:
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* Fills in our driver header block.
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*/
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int SetupDriver(AF_DRIVER *af) {
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char *name = NULL;
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int vram_size;
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int i;
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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tseng_type = detect( );
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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switch (tseng_type) {
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case ET_3000: name = "ET3000"; break;
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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case ET_4000: name = "ET4000"; break;
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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case ET_6000: name = "ET6000"; break;
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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default: return 1;
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}
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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i = 0;
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while (af->OemVendorName[i]) i++;
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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af->OemVendorName[i++] = ',';
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af->OemVendorName[i++] = ' ';
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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while (*name) af->OemVendorName[i++] = *(name++);
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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af->OemVendorName[i] = 0;
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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if (get_vesa_info(&vram_size, NULL, NULL) != 0) {
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if (tseng_type == ET_3000)
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af->TotalMemory = 512;
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else
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af->TotalMemory = 1024;
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} else {
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if (tseng_type == ET_3000)
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af->TotalMemory = MIN(vram_size / 1024, 512);
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else
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af->TotalMemory = MIN(vram_size / 1024, 1024);
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}
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if (tseng_type == ET_3000) {
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af->AvailableModes = available_et3000_modes;
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af->SetBank32 = ET3000SetBank32;
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af->SetBank32Len = (long)ET3000SetBank32End - (long)ET3000SetBank32;
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af->SetBank = ET3000SetBank;
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} else {
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af->AvailableModes = available_et4000_modes;
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af->SetBank32 = ET4000SetBank32;
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af->SetBank32Len = (long)ET4000SetBank32End - (long)ET4000SetBank32;
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af->SetBank = ET4000SetBank;
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}
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af->Attributes =
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(afHaveMultiBuffer | afHaveVirtualScroll | afHaveBankedBuffer);
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af->BankSize = 64;
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af->BankedBasePtr = 0xA0000;
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af->IOPortsTable = ports_table;
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af->SupplementalExt = ExtStub;
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af->GetVideoModeInfo = GetVideoModeInfo;
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af->SetVideoMode = SetVideoMode;
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af->RestoreTextMode = RestoreTextMode;
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af->GetClosestPixelClock = GetClosestPixelClock;
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af->SaveRestoreState = SaveRestoreState;
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af->SetDisplayStart = SetDisplayStart;
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af->SetActiveBuffer = SetActiveBuffer;
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af->SetVisibleBuffer = SetVisibleBuffer;
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af->GetDisplayStartStatus = GetDisplayStartStatus;
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af->SetPaletteData = SetPaletteData;
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return 0;
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}
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2024-05-29 19:55:33 +03:00
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/* InitDriver:
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2024-05-29 20:11:25 +03:00
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* The second thing to be called during the init process, after the
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2024-05-29 19:55:33 +03:00
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* application has mapped all the memory and I/O resources we need.
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*/
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2024-05-29 20:11:25 +03:00
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int InitDriver(AF_DRIVER *af) {
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hwptr_init(hwptr.IOMemMaps[0], af->IOMemMaps[0]);
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hwptr_init(hwptr.IOMemMaps[1], af->IOMemMaps[1]);
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hwptr_init(hwptr.IOMemMaps[2], af->IOMemMaps[2]);
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hwptr_init(hwptr.IOMemMaps[3], af->IOMemMaps[3]);
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hwptr_init(hwptr.BankedMem, af->BankedMem);
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hwptr_init(hwptr.LinearMem, af->LinearMem);
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return 0;
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2024-05-29 19:55:33 +03:00
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}
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/* FreeBEX:
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* Returns an interface structure for the requested FreeBE/AF extension.
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*/
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2024-05-29 20:11:25 +03:00
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void *FreeBEX(AF_DRIVER *af, unsigned long id) {
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switch (id) {
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#ifndef NO_HWPTR
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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case FAFEXT_HWPTR:
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/* allow farptr access to video memory */
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return &hwptr;
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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#endif
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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default: return NULL;
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}
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2024-05-29 19:55:33 +03:00
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}
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/* ExtStub:
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* Vendor-specific extension hook: we don't provide any.
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*/
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2024-05-29 20:11:25 +03:00
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int ExtStub( ) {
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return 0;
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2024-05-29 19:55:33 +03:00
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}
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/* GetVideoModeInfo:
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* Retrieves information about this video mode, returning zero on success
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* or -1 if the mode is invalid.
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*/
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2024-05-29 20:11:25 +03:00
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long GetVideoModeInfo(AF_DRIVER *af, short mode, AF_MODE_INFO *modeInfo) {
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VIDEO_MODE *info;
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int i;
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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if ((mode <= 0) || (mode > ((tseng_type == ET_3000) ? NUM_ET3000_MODES
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: NUM_ET4000_MODES)))
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return -1;
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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if (tseng_type == ET_3000)
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info = &et3000_mode_list[mode - 1];
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else
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info = &et4000_mode_list[mode - 1];
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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for (i = 0; i < (int)sizeof(AF_MODE_INFO); i++) ((char *)modeInfo)[i] = 0;
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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modeInfo->Attributes =
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(afHaveMultiBuffer | afHaveVirtualScroll | afHaveBankedBuffer);
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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modeInfo->XResolution = info->w;
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modeInfo->YResolution = info->h;
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modeInfo->BitsPerPixel = info->bpp;
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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modeInfo->MaxBuffers = (af->TotalMemory * 1024) /
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(info->w * info->h * BYTES_PER_PIXEL(info->bpp));
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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if (info->w > 1024) {
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modeInfo->MaxBytesPerScanLine = 2048 * BYTES_PER_PIXEL(info->bpp);
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modeInfo->MaxScanLineWidth = 2048;
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} else {
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modeInfo->MaxBytesPerScanLine = 1024 * BYTES_PER_PIXEL(info->bpp);
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modeInfo->MaxScanLineWidth = 1024;
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}
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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modeInfo->BytesPerScanLine = info->w * BYTES_PER_PIXEL(info->bpp);
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modeInfo->BnkMaxBuffers = modeInfo->MaxBuffers;
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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modeInfo->MaxPixelClock = 135000000;
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2024-05-29 19:55:33 +03:00
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2024-05-29 20:11:25 +03:00
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return 0;
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2024-05-29 19:55:33 +03:00
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}
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/* SetVideoMode:
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* Sets the specified video mode, returning zero on success.
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*/
|
2024-05-29 20:11:25 +03:00
|
|
|
long SetVideoMode(AF_DRIVER *af, short mode, long virtualX, long virtualY,
|
|
|
|
long *bytesPerLine, int numBuffers, AF_CRTCInfo *crtc) {
|
|
|
|
long available_vram;
|
|
|
|
long used_vram;
|
|
|
|
int width;
|
|
|
|
VIDEO_MODE *info;
|
|
|
|
RM_REGS r;
|
|
|
|
|
|
|
|
/* reject anything with hardware stereo, linear framebuffer, or noclear */
|
|
|
|
if (mode & 0xC400) return -1;
|
|
|
|
|
|
|
|
mode &= 0x3FF;
|
|
|
|
|
|
|
|
if ((mode <= 0) || (mode > ((tseng_type == ET_3000) ? NUM_ET3000_MODES
|
|
|
|
: NUM_ET4000_MODES)))
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
if (tseng_type == ET_3000)
|
|
|
|
info = &et3000_mode_list[mode - 1];
|
|
|
|
else
|
|
|
|
info = &et4000_mode_list[mode - 1];
|
|
|
|
|
|
|
|
/* call BIOS to set the mode */
|
|
|
|
if (info->bios) {
|
|
|
|
r.x.ax = info->bios;
|
|
|
|
r.x.bx = info->num;
|
|
|
|
} else
|
|
|
|
r.x.ax = info->num;
|
|
|
|
|
|
|
|
rm_int(0x10, &r);
|
|
|
|
|
|
|
|
/* adjust the virtual width for widescreen modes */
|
|
|
|
if (virtualX > info->w) {
|
|
|
|
if (virtualX > 1024) return -1;
|
|
|
|
|
|
|
|
*bytesPerLine = ((virtualX * BYTES_PER_PIXEL(info->bpp)) + 15) & 0xFFF0;
|
|
|
|
|
|
|
|
width = read_vga_register(0x3D4, 0x13);
|
|
|
|
write_vga_register(0x3D4, 0x13,
|
|
|
|
(width * (*bytesPerLine)) /
|
|
|
|
(info->w * BYTES_PER_PIXEL(info->bpp)));
|
|
|
|
} else
|
|
|
|
*bytesPerLine = info->w * BYTES_PER_PIXEL(info->bpp);
|
|
|
|
|
|
|
|
/* store info about the current mode */
|
|
|
|
af_bpp = info->bpp;
|
|
|
|
af_width = *bytesPerLine;
|
|
|
|
af_height = MAX(info->h, virtualY);
|
|
|
|
af_visible_page = 0;
|
|
|
|
af_active_page = 0;
|
|
|
|
af_scroll_x = 0;
|
|
|
|
af_scroll_y = 0;
|
|
|
|
af_bank = -1;
|
|
|
|
|
|
|
|
af->BufferEndX = af_width / BYTES_PER_PIXEL(af_bpp) - 1;
|
|
|
|
af->BufferEndY = af_height - 1;
|
|
|
|
af->OriginOffset = 0;
|
|
|
|
|
|
|
|
used_vram = af_width * af_height * numBuffers;
|
|
|
|
available_vram = af->TotalMemory * 1024;
|
|
|
|
|
|
|
|
if (used_vram > available_vram) return -1;
|
|
|
|
|
|
|
|
if (available_vram - used_vram >= af_width) {
|
|
|
|
af->OffscreenOffset = used_vram;
|
|
|
|
af->OffscreenStartY = af_height * numBuffers;
|
|
|
|
af->OffscreenEndY = available_vram / af_width - 1;
|
|
|
|
} else {
|
|
|
|
af->OffscreenOffset = 0;
|
|
|
|
af->OffscreenStartY = 0;
|
|
|
|
af->OffscreenEndY = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2024-05-29 19:55:33 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/* RestoreTextMode:
|
|
|
|
* Returns to text mode, shutting down the accelerator hardware.
|
|
|
|
*/
|
2024-05-29 20:11:25 +03:00
|
|
|
void RestoreTextMode(AF_DRIVER *af) {
|
|
|
|
RM_REGS r;
|
2024-05-29 19:55:33 +03:00
|
|
|
|
2024-05-29 20:11:25 +03:00
|
|
|
r.x.ax = 3;
|
|
|
|
rm_int(0x10, &r);
|
2024-05-29 19:55:33 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/* GetClosestPixelClock:
|
|
|
|
* I don't have a clue what this should return: it is used for the
|
|
|
|
* refresh rate control.
|
|
|
|
*/
|
2024-05-29 20:11:25 +03:00
|
|
|
long GetClosestPixelClock(AF_DRIVER *af, short mode, unsigned long pixelClock) {
|
|
|
|
/* ??? */
|
|
|
|
return 135000000;
|
2024-05-29 19:55:33 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/* SaveRestoreState:
|
|
|
|
* Stores the current driver status: not presently implemented.
|
|
|
|
*/
|
2024-05-29 20:11:25 +03:00
|
|
|
void SaveRestoreState(AF_DRIVER *af, int subfunc, void *saveBuf) {
|
|
|
|
/* not implemented (not used by Allegro) */
|
2024-05-29 19:55:33 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/* SetDisplayStart:
|
|
|
|
* Hardware scrolling function. The waitVRT value may be one of:
|
|
|
|
*
|
|
|
|
* -1 = don't set hardware, just store values for next page flip to use
|
|
|
|
* 0 = set values and return immediately
|
|
|
|
* 1 = set values and wait for retrace
|
|
|
|
*/
|
2024-05-29 20:11:25 +03:00
|
|
|
void SetDisplayStart(AF_DRIVER *af, long x, long y, long waitVRT) {
|
|
|
|
if (waitVRT >= 0) {
|
|
|
|
long a = (x * BYTES_PER_PIXEL(af_bpp)) +
|
|
|
|
((y + af_visible_page * af_height) * af_width);
|
|
|
|
|
|
|
|
asm volatile("cli");
|
|
|
|
|
|
|
|
if (waitVRT) {
|
|
|
|
do { } while (inportb(0x3DA) & 1); }
|
|
|
|
|
|
|
|
/* write high bit(s) to Tseng-specific registers */
|
|
|
|
if (tseng_type == ET_3000)
|
|
|
|
alter_vga_register(0x3D4, 0x23, 2, a >> 17);
|
|
|
|
else if (tseng_type == ET_4000)
|
|
|
|
alter_vga_register(0x3D4, 0x33, 3, a >> 18);
|
|
|
|
else if (tseng_type == ET_6000)
|
|
|
|
alter_vga_register(0x3D4, 0x33, 3, a >> 17);
|
|
|
|
|
|
|
|
/* write to normal VGA address registers */
|
|
|
|
write_vga_register(0x3D4, 0x0D, (a >> 2) & 0xFF);
|
|
|
|
write_vga_register(0x3D4, 0x0C, (a >> 10) & 0xFF);
|
|
|
|
|
|
|
|
asm volatile("sti");
|
2024-05-29 19:55:33 +03:00
|
|
|
|
2024-05-29 20:11:25 +03:00
|
|
|
if (waitVRT) {
|
|
|
|
do { } while (!(inportb(0x3DA) & 8)); }
|
2024-05-29 19:55:33 +03:00
|
|
|
|
2024-05-29 20:11:25 +03:00
|
|
|
/* write low 2 bits to VGA horizontal pan register */
|
|
|
|
if (af_bpp == 8) write_vga_register(0x3C0, 0x33, a & 3);
|
|
|
|
}
|
|
|
|
|
|
|
|
af_scroll_x = x;
|
|
|
|
af_scroll_y = y;
|
|
|
|
}
|
2024-05-29 19:55:33 +03:00
|
|
|
|
|
|
|
/* SetActiveBuffer:
|
|
|
|
* Sets which buffer is being drawn onto, for use in multi buffering
|
|
|
|
* systems (not used by Allegro).
|
|
|
|
*/
|
2024-05-29 20:11:25 +03:00
|
|
|
void SetActiveBuffer(AF_DRIVER *af, long index) {
|
|
|
|
if (af->OffscreenOffset) {
|
|
|
|
af->OffscreenStartY += af_active_page * af_height;
|
|
|
|
af->OffscreenEndY += af_active_page * af_height;
|
|
|
|
}
|
2024-05-29 19:55:33 +03:00
|
|
|
|
2024-05-29 20:11:25 +03:00
|
|
|
af_active_page = index;
|
2024-05-29 19:55:33 +03:00
|
|
|
|
2024-05-29 20:11:25 +03:00
|
|
|
af->OriginOffset = af_width * af_height * index;
|
2024-05-29 19:55:33 +03:00
|
|
|
|
2024-05-29 20:11:25 +03:00
|
|
|
if (af->OffscreenOffset) {
|
|
|
|
af->OffscreenStartY -= af_active_page * af_height;
|
|
|
|
af->OffscreenEndY -= af_active_page * af_height;
|
|
|
|
}
|
2024-05-29 19:55:33 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/* SetVisibleBuffer:
|
|
|
|
* Sets which buffer is displayed on the screen, for use in multi buffering
|
|
|
|
* systems (not used by Allegro).
|
|
|
|
*/
|
2024-05-29 20:11:25 +03:00
|
|
|
void SetVisibleBuffer(AF_DRIVER *af, long index, long waitVRT) {
|
|
|
|
af_visible_page = index;
|
2024-05-29 19:55:33 +03:00
|
|
|
|
2024-05-29 20:11:25 +03:00
|
|
|
SetDisplayStart(af, af_scroll_x, af_scroll_y, waitVRT);
|
2024-05-29 19:55:33 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/* GetDisplayStartStatus:
|
|
|
|
* Status poll for triple buffering. Not possible on the majority of
|
|
|
|
* present cards: this function is just a placeholder.
|
|
|
|
*/
|
2024-05-29 20:11:25 +03:00
|
|
|
int GetDisplayStartStatus(AF_DRIVER *af) {
|
|
|
|
return 1;
|
2024-05-29 19:55:33 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/* SetPaletteData:
|
|
|
|
* Palette setting routine.
|
|
|
|
*/
|
2024-05-29 20:11:25 +03:00
|
|
|
void SetPaletteData(AF_DRIVER *af, AF_PALETTE *pal, long num, long index,
|
|
|
|
long waitVRT) {
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (waitVRT) {
|
|
|
|
do {
|
|
|
|
} while (inportb(0x3DA) & 8);
|
|
|
|
|
|
|
|
do { } while (!(inportb(0x3DA) & 8)); }
|
|
|
|
|
|
|
|
for (i = 0; i < num; i++) {
|
|
|
|
outportb(0x3C8, index + i);
|
|
|
|
outportb(0x3C9, pal[i].red / 4);
|
|
|
|
outportb(0x3C9, pal[i].green / 4);
|
|
|
|
outportb(0x3C9, pal[i].blue / 4);
|
|
|
|
}
|
2024-05-29 19:55:33 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
/* ET3000SetBank32:
|
|
|
|
* Relocatable bank switch function, called with a bank number in %edx.
|
|
|
|
*/
|
|
|
|
|
|
|
|
asm ("
|
|
|
|
|
|
|
|
.globl _ET3000SetBank32, _ET3000SetBank32End
|
|
|
|
|
|
|
|
.align 4
|
|
|
|
_ET3000SetBank32:
|
|
|
|
pushl %edx
|
|
|
|
pushl %eax
|
|
|
|
|
|
|
|
movb %dl, %al /* mask read and write banks together */
|
|
|
|
shlb $3, %al
|
|
|
|
orb %dl, %al
|
|
|
|
orb $0x40, %al /* select 64k segments */
|
|
|
|
|
|
|
|
movl $0x3CD, %edx
|
|
|
|
outb %al, %dx /* write to the card */
|
|
|
|
|
|
|
|
popl %eax
|
|
|
|
popl %edx
|
|
|
|
ret
|
|
|
|
|
|
|
|
_ET3000SetBank32End:
|
|
|
|
|
|
|
|
");
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* ET3000SetBank:
|
|
|
|
* C-callable bank switch function. This version simply chains to the
|
|
|
|
* relocatable ET3000SetBank32() above.
|
|
|
|
*/
|
|
|
|
void ET3000SetBank(AF_DRIVER *af, long bank)
|
|
|
|
{
|
2024-05-29 20:11:25 +03:00
|
|
|
asm(" call _ET3000SetBank32 " : : "d"(bank));
|
2024-05-29 19:55:33 +03:00
|
|
|
|
2024-05-29 20:11:25 +03:00
|
|
|
af_bank = bank;
|
2024-05-29 19:55:33 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* ET4000SetBank32:
|
|
|
|
* Relocatable bank switch function, called with a bank number in %edx.
|
|
|
|
*/
|
|
|
|
|
|
|
|
asm ("
|
|
|
|
|
|
|
|
.globl _ET4000SetBank32, _ET4000SetBank32End
|
|
|
|
|
|
|
|
.align 4
|
|
|
|
_ET4000SetBank32:
|
|
|
|
pushl %edx
|
|
|
|
pushl %eax
|
|
|
|
|
|
|
|
movb %dl, %al /* mask read and write banks together */
|
|
|
|
shlb $4, %al
|
|
|
|
orb %dl, %al
|
|
|
|
|
|
|
|
movl $0x3CD, %edx
|
|
|
|
outb %al, %dx /* write to the card */
|
|
|
|
|
|
|
|
popl %eax
|
|
|
|
popl %edx
|
|
|
|
ret
|
|
|
|
|
|
|
|
_ET4000SetBank32End:
|
|
|
|
|
|
|
|
");
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* ET4000SetBank:
|
|
|
|
* C-callable bank switch function. This version simply chains to the
|
|
|
|
* relocatable ET4000SetBank32() above.
|
|
|
|
*/
|
|
|
|
void ET4000SetBank(AF_DRIVER *af, long bank)
|
|
|
|
{
|
2024-05-29 20:11:25 +03:00
|
|
|
asm(" call _ET4000SetBank32 " : : "d"(bank));
|
2024-05-29 19:55:33 +03:00
|
|
|
|
2024-05-29 20:11:25 +03:00
|
|
|
af_bank = bank;
|
2024-05-29 19:55:33 +03:00
|
|
|
}
|